Multiphase Voltage Regulator Using Coupled Inductors

• US 20160048183A1
• Filed: 10/29/2015
• Published: 02/18/2016
• Est. Priority Date: 05/20/2013
• Status: Active Grant

• Current Assignee: Dell Products LP (Dell Technologies Inc.)
• Original Assignee: Dell Products LP (Dell Technologies Inc.)
• Inventors: Breen, John J., Mathew, Abey K.
• Granted Patent: US 9,829,944 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: H02M 1/0064 Magnetic structures combining different functions, e.g. storage, filtering or transformation
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel

Abstract

In response to a condition not being met, asserting a control input of a driver to close a low side switch in a phase leg of a multiphase voltage regulator using coupled inductors, de-asserting the control input in response to a signal to close a high side switch of the phase leg, and asserting the control input in response to a signal to open the high side switch; and in response to the condition not being met, de-asserting the control input, asserting the control input in response to a signal to close a high side switch of another phase leg, and de-asserting the control input in response to a signal to open the high side switch of the other phase leg and to the current in the phase leg being less than a threshold.

Claims

1. A method comprising:

in response to a first condition not being met;

asserting a control input of a driver to close a low side switch of a first phase leg of a multiphase voltage regulator, wherein the first phase leg includes a first inductor;

in response to a signal to close a first high side switch of the first phase leg, de-asserting the control input to open the low side switch; and

in response to a signal to open the first high side switch, asserting the control input to close the low side switch; and

in response to the first condition being met;

de-asserting the control input to open the low side switch;

in response

     1) to a signal to close a second high side switch of a second phase leg of the multiphase voltage regulator and

     2) to the control input being de-asserted, asserting the control input to close the low side switch, wherein the second phase leg includes a second inductor magnetically coupled to the first inductor; and

in response

     1) to a signal to open the second high side switch and

     2) to a second condition being met, wherein the second condition includes the control input being asserted, de-asserting the control input to open the low side switch.

2. The method of claim 1, wherein the first condition comprises a value of a load current of the multiphase regulator being less than a predetermined value.

3. The method of claim 1, wherein the low side switch, the first high side switch and the second high side switch are field effect transistors.

4. The method of claim 1, further comprising:

determining a value of a current flowing through the first inductor;

wherein;

the second condition further comprises the value of the current flowing through the first inductor being less than or equal to a predetermined value.

5. The method of claim 4, wherein the predetermined value is zero.

6. The method of claim 4, wherein determining the value of the current flowing through the first inductor comprises:

determining a voltage drop across a resistor, wherein the resistor is coupled to the low side switch and to the first inductor.

7. An information handling system comprising:

a central processing unit; and

a multiphase voltage regulator coupled to the central processing unit and providing a load current to the information handling system, the voltage regulator including;

a first phase leg comprising a first inductor, a first high side switch, and a low side switch;

a second phase leg comprising a second inductor and a second high side switch, wherein the second inductor is magnetically coupled to the first inductor;

a first driver having a first input, wherein asserting the first input closes the low side switch and de-asserting the input opens the low side switch;

a second driver having a second input, wherein asserting the second input closes the second high side switch and de-asserting the second input opens the second high side switch;

a third driver having a third input, wherein asserting the third input closes the first high side switch and de-asserting the third input opens the first high side switch; and

control logic coupled to the first input, the second input and the third input;

wherein the control logic is operable in a first mode to;

assert the first input to close the low side switch;

de-assert the first input to open the low side switch and assert the third input, in response to the beginning of a first time interval; and

assert the first input to close the low side switch and de-assert the third input, in response to the end of the first time interval; and

the control logic is operable in a second mode to;

de-assert the first input to open the first low side switch;

assert the first input to close the first low side switch and assert the second input, in response to the beginning of a second time interval;

de-assert the second input, in response to the end of the second time interval; and

de-assert the first input to open the low side switch, in response to a condition being met, wherein the condition includes the end of the second time interval.

8. The information handling system of claim 7, wherein:

the control logic operates in the second mode in response to the load current being below a predetermined threshold.

9. The information handling system of claim 7, wherein:

the control logic operates in the second mode in response to an indication from the central processing unit.

10. The information handling system of claim 7, wherein:

the first high side switch, the second high side switch and the first low side switch are field effect transistors.

11. The information handling system of claim 7, wherein the voltage regulator further comprises circuitry to determine an induced current in the first inductor.

12. The information handling system of claim 11, wherein the condition further comprises the induced current being less than a predetermined threshold.

13. The information handling system of claim 11, wherein the condition further comprises the induced current being equal to a predetermined threshold.

14. The information handling system of claim 11, wherein the predetermined threshold is zero.

15. The information handling system of claim 11, wherein:

the circuitry to determine the induced current comprises a resistor coupled to the first low side switch and to the first inductor.

the resistor is coupled to the low side switch and to the first inductor.

16. A multiphase buck voltage regulator comprising:

a coupled inductor having a first winding and a second winding;

a switch operable to direct current in the first winding to electrical ground;

a driver having a control input, wherein the driver is operable to close the switch in response to the control input being asserted and operable to open the switch in response to the control input being de-asserted; and

control circuitry operable in a first mode and in a second mode, wherein the first mode includes;

in response to the beginning of a first time interval, begin driving a current through the first winding and de-assert the control input to open the switch;

in response to the end of the first time interval, stop driving a current through the first winding and assert the control input to close the switch;

in response to the beginning of a second time interval, begin driving a current through the second winding; and

in response to the end of the second time interval, stop driving a current through the second winding; and

the second mode includes;

in response to the beginning of a third time interval, begin driving a current through the second winding and assert the control input to close the switch;

in response to the end of the third time interval, stop driving a current through the second winding; and

in response to the end of the third time interval and to an induced current in the first winding being less than or equal to a first predetermined threshold, de-assert the control input to open the switch.

17. The multiphase buck voltage regulator of claim 16, wherein:

the control circuitry operates in the second mode in response to a load current output by the voltage regulator being less than a second predetermined threshold.

18. The multiphase buck voltage regulator of claim 16, wherein:

the switch is a field effect transistor.

19. The multiphase buck voltage regulator of claim 16, wherein the first predetermined threshold is zero.