CIRCUIT AND LAYOUT DESIGN METHODS AND LOGIC CELLS FOR SOFT ERROR HARD INTEGRATED CIRCUITS
First Claim
1. An integrated circuit comprising logic cells with one or more sets of two complementary inputs and one or more sets of two complementary outputs, the integrated circuit derived from an integrated circuit layout comprising:
- a first contact area from a first logic cell;
a second contact area from a second logic cell comprising a non-zero, non-opposing effect with respect to the first contact area, wherein the first contact area and the second contact area comprise a first distance, andwherein;
when the first distance is below a predetermined threshold, the first logic cell and the second logic cell are placed along a first R-line of the integrated circuit such that a third contact area, from either of the first or second logic cells, comprising an opposing effect with respect to the first contact area and the second contact area, is placed between the first contact area and second contact area; and
when the first distance is not below the predetermined threshold;
a filter cell is inserted between the first contact area and the second contact area, the filter cell configured to decouple the first logic cell and the second logic cells; and
the first contact area is placed along the first R-line and the second contact area is placed along a second R-line of the integrated circuit.
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Accused Products
Abstract
In various embodiments, an integrated circuit derived from an integrated circuit layout is disclosed. In some embodiments, the integrated circuit layout comprises a first contact area from a first logic cell and a second contact area from a second logic cell. The second contact area comprises a non-zero, non-opposing effect with respect to the first contact area. The first contact area and the second contact area comprise a first distance. When the first distance is below a predetermined threshold, the first logic cell and the second logic cell are placed along a first R-line of the circuit and a third contact area comprising an opposing effect with respect to the first contact area and the second contact area is placed between the first contact area and second contact area.
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Citations
12 Claims
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1. An integrated circuit comprising logic cells with one or more sets of two complementary inputs and one or more sets of two complementary outputs, the integrated circuit derived from an integrated circuit layout comprising:
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a first contact area from a first logic cell; a second contact area from a second logic cell comprising a non-zero, non-opposing effect with respect to the first contact area, wherein the first contact area and the second contact area comprise a first distance, and wherein; when the first distance is below a predetermined threshold, the first logic cell and the second logic cell are placed along a first R-line of the integrated circuit such that a third contact area, from either of the first or second logic cells, comprising an opposing effect with respect to the first contact area and the second contact area, is placed between the first contact area and second contact area; and when the first distance is not below the predetermined threshold; a filter cell is inserted between the first contact area and the second contact area, the filter cell configured to decouple the first logic cell and the second logic cells; and the first contact area is placed along the first R-line and the second contact area is placed along a second R-line of the integrated circuit. - View Dependent Claims (2, 3, 4)
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5. A method of designing an integrated circuit comprising logic cells with one or more sets of two complementary inputs and one or more sets of two complementary outputs, the integrated circuit derived from an integrated circuit layout, the method comprising:
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accessing in the integrated circuit layout, by a processor, a first contact area from a first logic cell; accessing in the integrated circuit layout, by the processor, a second contact area from a second logic cell comprising a non-zero, non-opposing effect with respect to the first contact area; determining, by the processor, a first distance between the first contact area and the second contact area; determining, by the processor, whether the first distance is below a predetermined threshold; when it is determined the first distance is below the predetermined threshold; placing in the integrated circuit layout, by the processor, the first logic cell and the second logic cell along a first R-line of the integrated circuit; and placing in the integrated circuit layout, by the processor, a third contact area, from either of the first or second logic cells, comprising an opposing effect with respect to the first contact area and the second contact area, such that the third contact area is placed between the first contact area and second contact area; and when it is determined that the first distance is not below the predetermined threshold; inserting in the integrated circuit layout, by the processor, a filter cell between the first contact area and the second contact area, the filter cell configured to decouple the first logic cell and the second logic cells; placing in the integrated circuit layout, by the processor, the first contact area along the first R-line; and placing in the integrated circuit layout, by the processor, the second contact area along a second R-line of the integrated circuit. - View Dependent Claims (6, 7, 8)
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9. A non-transitory computer readable medium comprising instructions that, when executed by a processor, cause a machine to perform operations comprising:
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accessing in an integrated circuit layout a first contact area from a first logic cell; accessing in the integrated circuit layout a second contact area from a second logic cell comprising a non-zero, non-opposing effect with respect to the first contact area; determining a first distance between the first contact area and the second contact area; determining whether the first distance is below a predetermined threshold; when it is determined the first distance is below the predetermined threshold; placing in the integrated circuit layout the first logic cell and the second logic cell along a first R-line of the integrated circuit; and placing in the integrated circuit layout a third contact area, from either of the first or second logic cells, comprising an opposing effect with respect to the first contact area and the second contact area, such that the third contact area is placed between the first contact area and second contact area; and when it is determined that the first distance is not below the predetermined threshold; inserting in the integrated circuit layou a filter cell between the first contact area and the second contact area, the filter cell configured to decouple the first logic cell and the second logic cells; placing in the integrated circuit layout the first contact area along the first R-line; and placing in the integrated circuit layout the second contact area along a second R-line of the integrated circuit. - View Dependent Claims (10, 11, 12)
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Specification