REDUCTION OF BUFFER OVERFLOW

• US 20160057044A1
• Filed: 12/16/2013
• Published: 02/25/2016
• Est. Priority Date: 05/09/2013
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Ali Koc, Maruti Gupta, Rath Vannithamby, Satish Jha
• Inventors: KOC, ALI, GUPTA, MARUTI, VANNITHAMBY, RATH, JHA, SATISH
• Granted Patent: US 10,164,693 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H04B 7/0417 Feedback systems
• CPC Class Codes: H04B 7/0617 for beam forming
• CPC Class Codes: H04L 27/0008 arrangements for allowing a transmitter or receiver to use more than one type of modulation negotiating modulation type for two-way transmission paths H04L5/1453
• CPC Class Codes: H04L 27/362 Modulation using more than one carrier, e.g. with quadrature carriers, separately amplitude modulated H04L27/366 takes precedence
• CPC Class Codes: H04L 43/16 Threshold monitoring
• CPC Class Codes: H04L 5/0053 Allocation of signaling, i.e. of overhead other than pilot signals
• CPC Class Codes: H04L 5/006 Quality of the received signal, e.g. BER, SNR, water filling
• CPC Class Codes: H04W 12/041 Key generation or derivation
• CPC Class Codes: H04W 24/02 Arrangements for optimising operational condition
• CPC Class Codes: H04W 4/70 Services for machine-to-machine communication [M2M] or machine type communication [MTC]
• CPC Class Codes: H04W 52/0209 in terminal devices terminal devices per se H04W88/02
• CPC Class Codes: H04W 52/0216 using a pre-established activity schedule, e.g. traffic indication frame
• CPC Class Codes: H04W 52/0229 where the received signal is a wanted signal
• CPC Class Codes: H04W 52/0235 where the received signal is a power saving command
• CPC Class Codes: H04W 72/0453 Resources in frequency domain, e.g. a carrier in FDMA
• CPC Class Codes: H04W 72/12 Wireless traffic scheduling
• CPC Class Codes: H04W 72/20 Control channels or signalling for resource management
• CPC Class Codes: H04W 72/21 in the uplink direction of a wireless link, i.e. towards the network
• CPC Class Codes: H04W 72/56 based on priority criteria
• CPC Class Codes: H04W 76/10 Connection setup
• CPC Class Codes: H04W 76/14 : Direct-mode setup
• CPC Class Codes: H04W 88/02 : Terminal devices
• CPC Class Codes: Y02D 30/70 : in wireless communication networks

Abstract

Technology for reducing buffer overflow at a Third Generation Partnership Project (3GPP) Serving Gateway (S-GW) is described. A buffer overflow message may be received, at an evolved node B (eNB) from the S-GW, indicating potential overflow of downlink information at an S-GW buffer. The downlink information may be stored at the S-GW buffer until a plurality of user equipments (UEs) awake from a low power mode during a discontinuous reception (DRX) sleep cycle. One or more UEs may be selected from the plurality of UEs according to predefined criteria, wherein the one or more UEs are in a connected mode. The DRX configurations of the one or more UEs may be modified in order to reduce the downlink information that is stored at the S-GW buffer, thereby reducing the potential for overflow at the S-GW buffer.

Claims

1. A node operable to control discontinuous reception (DRX) configurations for a plurality of user equipments (UEs), the node having computer circuitry configured to:

receive a buffer overflow message, from a serving gateway (S-GW), indicating a potential overflow at an S-GW buffer when downlink information that is stored at the S-GW buffer exceeds a predetermined threshold;

select one or more UEs from the plurality of UEs according to predefined criteria; and

modify the DRX configurations of the one or more UEs in order to reduce the downlink information that is stored at the S-GW buffer, thereby reducing the potential for overflow at the S-GW buffer.

2. The computer circuitry of claim 1, wherein the downlink information is stored at the S-GW buffer until the UEs awake from a low power mode during a discontinuous reception (DRX) sleep cycle.

3. The computer circuitry of claim 1, further configured to receive the buffer overflow message from the S-GW via a mobility management entity (MME).

4. The computer circuitry of claim 1, further configured to modify the DRX configurations of the one or more UEs by reducing a DRX sleep cycle length of the one or more UEs.

5. The computer circuitry of claim 1, further configured to select the one or more UEs based on the predefined criteria of a highest data rate or a longest DRX sleep cycle length in comparison to the plurality of UEs.

6. The computer circuitry of claim 1, further configured to modify the DRX configurations of the one or more UEs that are in a connected mode.

7. The computer circuitry of claim 1, further configured to modify a DRX sleep cycle length of the one or more UEs when the UEs transition from the idle mode to the connected mode.

8. The computer circuitry of claim 1, further configured to prevent the one or more UEs from entering a low power mode during a DRX sleep cycle in response to receiving the buffer overflow message from the S-GW.

9. The computer circuitry of claim 1, further configured to modify DRX sleep cycle lengths of the plurality of UEs in response to receiving multiple buffer overflow messages from the S-GW.

10. The computer circuitry of claim 1, further configured to reconfigure DRX sleep cycle lengths of the one or more UEs to a previous DRX configuration in response to receiving an indication from the S-GW that the potential for overflow at the S-GW buffer has ended.

11. The computer circuitry of claim 1, wherein the node is selected from a group consisting of a base station (BS), a Node B (NB), an evolved Node B (eNB), a baseband unit (BBU), a remote radio head (RRH), a remote radio equipment (RRE), or a remote radio unit (RRU).

12. A Third Generation Partnership Project (3GPP) Serving Gateway (S-GW) operable to buffer downlink information for a plurality of user equipments (UEs), the S-GW having computer circuitry configured to:

receive the downlink information for the plurality of UEs;

store the downlink information, at an S-GW buffer, when the plurality of UEs are in a low power mode during a discontinuous reception (DRX) sleep cycle;

detect an overflow potential at the S-GW buffer when the downlink information stored at the S-GW buffer exceeds a predetermined threshold; and

communicate a buffer overflow message indicating the overflow potential at the S-GW buffer to an evolved node B (eNB), wherein the buffer overflow message instructs the eNB to modify DRX configurations associated with one or more UEs in the plurality of UEs in order to reduce overflow potential at the S-GW buffer.

13. The computer circuitry of claim 12, wherein the buffer overflow message instructs the eNB to modify a DRX sleep cycle length of the one or more UEs in order to reduce overflow potential at the S-GW buffer.

14. The computer circuitry of claim 12, wherein the one or more UEs are in a connected mode.

15. The computer circuitry of claim 12, further configured to communicate the buffer overflow message to the eNB via a mobility management entity (MME).

16. The computer circuitry of claim 12, wherein the plurality of UEs include machine type communication (MTC) devices.

17. The computer circuitry of claim 12, wherein the plurality of UEs include an antenna, a touch sensitive display screen, a speaker, a microphone, a graphics processor, an application processor, internal memory, or a non-volatile memory port.

18. A method for reducing buffer overflow at a Third Generation Partnership Project (3GPP) Serving Gateway (S-GW), the method comprising:

receiving a buffer overflow message, at an evolved node B (eNB) from the S-GW, indicating potential overflow of downlink information at a S-GW buffer, wherein the downlink information is stored at the S-GW buffer until a plurality of user equipments (UEs) awake from a low power mode during a discontinuous reception (DRX) sleep cycle;

selecting one or more UEs from the plurality of UEs according to predefined criteria, wherein the one or more UEs are in a connected mode; and

modifying the DRX configurations of the one or more UEs in order to reduce the downlink information that is stored at the S-GW buffer, thereby reducing the potential for overflow at the S-GW buffer

19. The method of claim 18, further comprising receiving the buffer overflow message from the S-GW when the downlink information that is stored at the S-GW buffer exceeds a predetermined threshold.

20. The method of claim 18, further comprising receiving the buffer overflow message from the S-GW via a mobility management entity (MME).

21. The method of claim 18, further comprising selecting the one or more UEs based on the predefined criteria relating to a data rate or a DRX cycle length.

22. The method of claim 18, wherein modifying the DRX configurations of the one or more UEs comprises reducing a DRX sleep cycle length of the one or more UEs.

23. The method of claim 18, wherein modifying the DRX configurations of the one or more UEs comprises preventing the one or more UEs from entering a DRX sleep cycle.