MULTIPLICATION OPERATIONS IN MEMORY
First Claim
Patent Images
1. A method for performing multiplication operations comprising:
- performing a multiplication operation on;
a first element stored in a group of memory cells coupled to a first access line and a number of sense lines of a memory array; and
a second element stored in a group of memory cells coupled to a second access line and the number of sense lines of the memory array;
wherein the multiplication operation includes a number of operations performed without transferring data via an input/output (I/O) line.
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Abstract
Examples of the present disclosure provide apparatuses and methods for performing multiplication operations in a memory. An example method comprises performing a multiplication operation on a first element stored in a group of memory cells coupled to a first access line and a number of sense lines of a memory array and a second element stored in a group of memory cells coupled to a second access line and the number of sense lines of the memory array. The method can include a number operations performed without transferring data via an input/output (I/O) line.
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Citations
40 Claims
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1. A method for performing multiplication operations comprising:
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performing a multiplication operation on; a first element stored in a group of memory cells coupled to a first access line and a number of sense lines of a memory array; and a second element stored in a group of memory cells coupled to a second access line and the number of sense lines of the memory array; wherein the multiplication operation includes a number of operations performed without transferring data via an input/output (I/O) line. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An apparatus comprising:
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a first group of memory cells coupled to a first access line and configured to store a first element; a second group of memory cells coupled to a second access line and configured to store a second element; and a controller configured to multiply the first element by the second element by controlling sensing circuitry to perform a number of operations without transferring data via an input/output (I/O) line. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A method for performing multiplication operations comprising:
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performing a multiplication operation on; a first element stored in a group of memory cells coupled to a first access line and a number of sense lines of a memory array; and a second element stored in a group of memory cells coupled to a second access line and the number of sense lines of the memory array; wherein the multiplication operation includes a number of operations performed without transferring data via an input/output (I/O) line; and storing a result of the multiplication operation as a third element stored in a group of memory cells coupled to a third access line. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28)
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29. An apparatus comprising:
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a first number of memory cells coupled to a number of sense lines and to a first access line; a second number of memory cells coupled to the number of sense lines and to a second access line; a third number of memory cells coupled to the number of sense lines and to a third access line; and a controller configured to cause; multiplying of each of a number of first elements stored in the first number of memory cells by a corresponding element of a number of second elements stored in the second number of memory cells using a number of operations; and storing the results of multiplying the number of first elements by the number of second elements in the third number of memory cells, wherein a sense line address access is not performed to; multiply using the number of operations; and store.
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30. A method for comparing elements comprising:
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performing a multiplication operation in a memory array on; a plurality (M) of first elements stored in a first group of memory cells coupled to a first access line and to a number of sense lines of a memory array; and a plurality (M) of second elements stored in the second group of memory cells coupled to a second access line and to the number of sense lines of the memory array; and providing a multiplication operation result that indicates a product of each corresponding element of the plurality of M first elements with each corresponding element of the plurality of M second elements. - View Dependent Claims (31, 32, 33, 34, 35, 36, 37, 38, 39, 40)
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Specification