METHOD OF IMPROVING ERROR CHECKING AND CORRECTION PERFORMANCE OF MEMORY
First Claim
1. A method of improving an error checking and correction performance of a memory, the method comprising:
- replacing a defective column including a defective memory cell of a memory cell array with a spare column of a spare cell array, wherein the memory cell array comprises memory cells in a matrix, and the spare cell array comprises spare memory cells in a matrix to be replaced for defective memory cells;
storing check bits of error correction code in at least one memory cell of at least one of a spare column that is not used to replace the defective column and the defective column;
storing defect information regarding the defective memory cell;
selecting whether the at least one memory cell storing the check bits is to be used to perform error checking and correction on a memory, based on the defect information; and
performing error checking and correction on the memory using a memory cell selected based on a result of selecting whether the at least one memory cell storing the check bits is to be used.
1 Assignment
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Accused Products
Abstract
A method of improving an error checking and correction performance of a memory includes replacing a defective column including a defective memory cell of the memory cell array with a spare column of a the spare cell array, wherein the memory cell array includes memory cells in a matrix and the spare cell array includes spare memory cells in a matrix to be replaced for defective memory cells; storing check bits of error correction code in at least one memory cell of the defective column; storing defect information regarding a defect of the defective memory cell; determining whether the at least one memory cell storing the check bits is to be used to perform error checking and correction on a memory, based on the defect information; and performing error checking and correction on the memory using a memory cell selected based on a result of determining whether the at least one memory cell storing the check bits is to be used.
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Citations
15 Claims
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1. A method of improving an error checking and correction performance of a memory, the method comprising:
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replacing a defective column including a defective memory cell of a memory cell array with a spare column of a spare cell array, wherein the memory cell array comprises memory cells in a matrix, and the spare cell array comprises spare memory cells in a matrix to be replaced for defective memory cells; storing check bits of error correction code in at least one memory cell of at least one of a spare column that is not used to replace the defective column and the defective column; storing defect information regarding the defective memory cell; selecting whether the at least one memory cell storing the check bits is to be used to perform error checking and correction on a memory, based on the defect information; and performing error checking and correction on the memory using a memory cell selected based on a result of selecting whether the at least one memory cell storing the check bits is to be used. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of improving an error checking and correction performance of a memory, the method comprising:
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replacing a defective column including a defective memory cell of a memory cell array with a spare column of a spare cell array, wherein the memory cell array comprises memory cells in a matrix, and the spare cell array comprises spare memory cells in a matrix to be replaced for defective memory cells; storing check bits of error correction code in at least one memory cell of at least one of a spare column that is not used to replace the defective column and the defective column; storing defect information regarding the defective memory cell in a storage unit; selecting whether the at least one memory cell storing the check bits is to be used to perform error checking and correction on a memory, based on the defect information; and performing error checking and correction on the memory using a memory cell selected based on a result of selecting whether the at least one memory cell storing the check bits is to be used. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15)
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Specification