Method for dynamically adjusting a cache buffer of a solid state drive

• US 20160062898A1
• Filed: 03/26/2015
• Published: 03/03/2016
• Est. Priority Date: 08/28/2014
• Status: Active Grant

• Current Assignee: Quanta Storage Incorporated (AUO Corp.)
• Original Assignee: Quanta Storage Incorporated (AUO Corp.)
• Inventors: Lin, Cheng-Yi, Hsiao, Yi-Long
• Granted Patent: US 9,507,723 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0866 for peripheral storage systems, e.g. disk cache
• CPC Class Codes: G06F 12/0871 Allocation or management of cache space
• CPC Class Codes: G06F 12/0873 Mapping of cache memory to specific storage devices or parts thereof
• CPC Class Codes: G06F 2212/214 Solid state disk
• CPC Class Codes: G06F 2212/461 Sector or disk block
• CPC Class Codes: G06F 2212/604 Details relating to cache allocation
• CPC Class Codes: G06F 2212/608 Details relating to cache mapping

Abstract

A method for dynamically adjusting a cache buffer of a solid state drive includes receiving data, determine if the data are continuous according to logical allocation addresses of the data, increasing a memory size of the cache buffer, searching the cache buffer for same data as at least one portion of the data, modifying and merging of the at least one portion of the data with the same data already temporarily stored in the cache buffer, temporarily storing the data in the cache buffer.

Claims

1. A method for dynamically adjusting a cache buffer of a solid state drive, comprising:

receiving data;

increasing a memory size of the cache buffer when it is determined that the data are continuous;

searching the cache buffer for same data as at least one portion of the data, modifying and merging of the at least one portion of the data with the same data already temporarily stored in the cache buffer; and

temporarily storing the data in the cache buffer.

2. The method of claim 1, wherein the continuity of the data is determined according to logical allocation addresses of the data.

3. The method of claim 1, wherein increasing the memory size of the cache buffer is increasing the memory size of the cache buffer by increasing the number of cache memory units of the cache buffer by a predetermined number.

4. The method of claim 3, wherein the predetermined number is a fixed integer or any integer.

5. The method of claim 1, further comprising:

decreasing memory size of the cache buffer when it is determined that the data are not continuous.

6. The method of claim 5, wherein decreasing memory size of the cache buffer is decreasing memory size of the cache buffer by decreasing the number of cache memory units of the cache buffer by a predetermined number.

7. The method of claim 1, wherein the same data is determined according to logical allocation addresses of the data.

8. The method of claim 7, wherein when the data are continuous, searching the cache buffer for same data as the data by comparing the logical allocation addresses of the data by block.

9. The method of claim 7, wherein when there is no same data, temporarily storing the data in the cache buffer.