ADJUSTING THE MAGNITUDE OF A CAPACITANCE OF A DIGITALLY CONTROLLED CIRCUIT

• US 20160065227A1
• Filed: 02/09/2015
• Published: 03/03/2016
• Est. Priority Date: 08/27/2014
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Ainspan, Herschel A., Ferriss, Mark A., Friedman, Daniel J., Rylyakov, Alexander V., Sadhu, Bodhisatwa, Valdes-Garcia, Alberto
• Granted Patent: US 9,325,332 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H03B 1/00 Details
• CPC Class Codes: H03B 5/1212 the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
• CPC Class Codes: H03B 5/1215 the current source or degeneration circuit being in common to both transistors of the pair, e.g. a cross-coupled long-tailed pair
• CPC Class Codes: H03B 5/1228 the amplifier comprising one or more field effect transistors
• CPC Class Codes: H03B 5/124 the means comprising a voltage dependent capacitance
• CPC Class Codes: H03B 5/1243 the means comprising voltage variable capacitance diodes
• CPC Class Codes: H03B 5/1265 switched capacitors
• CPC Class Codes: H03H 11/04 Frequency selective two-port networks
• CPC Class Codes: H03H 19/006 simulating one-port networks
• CPC Class Codes: H03J 2200/10 Tuning of a resonator by means of digitally controlled capacitor bank
• CPC Class Codes: H03K 3/354 Astable circuits
• CPC Class Codes: H03K 5/04 by increasing duration; by decreasing duration
• CPC Class Codes: H03L 2207/06 Phase locked loops with a controlled oscillator having at least two frequency control terminals
• CPC Class Codes: H03L 7/0898 the source or sink current values being variable H03L7/0896 takes precedence
• CPC Class Codes: H03L 7/093 using special filtering or amplification characteristics in the loop H03L7/087 - H03L7/091 take precedence
• CPC Class Codes: H03L 7/099 concerning mainly the controlled oscillator of the loop
• CPC Class Codes: H03L 7/0992 comprising a counter or a frequency divider
• CPC Class Codes: H03L 7/103 the additional signal being a digital signal
• CPC Class Codes: H03L 7/18 using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence
• CPC Class Codes: H03L 7/199 with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation

Abstract

An apparatus comprises a digitally controlled circuit having a variable capacitance and a controller configured to adjust a magnitude of the variable capacitance of the digitally controlled circuit. The digitally controlled circuit comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements. The controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements.

Claims

1. An apparatus comprising:

a digitally controlled circuit having a variable capacitance;

a controller configured to adjust a magnitude of the variable capacitance of the digitally controlled circuit;

a digital-to-analog converter providing a digital-to-analog control voltage responsive to control codes supplied by the controller; and

a plurality of switches configured to select one of the digital-to-analog control voltage, a fixed high voltage and a fixed low voltage to connect to corresponding ones of the plurality of gain elements responsive to corresponding control signals from the controller;

wherein the digitally controlled circuit comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements;

wherein the controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements;

wherein the controller is configured to adjust the control signals such that one of the plurality of gain elements is supplied with the digital-to-analog control voltage while remaining ones of the plurality of gain elements are supplied with the fixed high voltage or the fixed low voltage; and

wherein the digital-to-analog converter comprises a transfer function such that at least a top two control codes produce a same maximum voltage and at least a bottom two control codes produce a same minimum voltage.

7. The apparatus of claim 1, wherein the digitally controlled circuit comprises one of an oscillator and a filter.

8. The apparatus of claim 1, wherein the plurality of gain elements comprise varactors.

10. The apparatus of claim 1, wherein the plurality of gain elements comprise high-Q switched capacitors.

12. An integrated circuit comprising the apparatus of claim 1.

2-3. -3. (canceled)

4. An apparatus comprising:

a digitally controlled circuit having a variable capacitance; and

a controller configured to adjust a magnitude of the variable capacitance of the digitally controlled circuit;

wherein the digitally controlled circuit comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements;

wherein the controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements;

wherein the plurality of gain elements comprises two or more banks of gain elements; and

wherein control signals provided by the controller for gain elements in the two or more banks are offset from one another.

5. The apparatus of claim 4, wherein the magnitude of the offset of the control signals is based at least in part on the number of banks of gain elements.

6. The apparatus of claim 4, further comprising:

first and second digital-to-analog converters providing respective first and second digital-to-analog control voltages responsive to control codes supplied by the controller;

a first plurality of switches configured to select one of the first digital-to-analog control voltage, a fixed high voltage and a fixed low voltage to connect to corresponding ones of a first one of the two or more banks of gain elements responsive to corresponding control signals from the controller;

a second plurality of switches configured to select one of the second digital-to-analog control voltage, the fixed high voltage and the fixed low voltage to connect to corresponding ones of a second one of the two or more banks of gain elements responsive to corresponding control signals from the controller;

wherein the controller is configured to adjust the control signals such that one of the gain elements in the first bank is supplied with the first digital-to-analog control voltage, one of the gain elements in the second bank is supplied with the second digital-to-analog control voltage, and remaining ones of the gain elements in the first bank and the second bank are supplied with the fixed high voltage or the fixed low voltage.

9. An apparatus comprising:

a digitally controlled circuit having a variable capacitance; and

a controller configured to adjust a magnitude of the variable capacitance of the digitally controlled circuit;

wherein the digitally controlled circuit comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements;

wherein the controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements; and

wherein the digitally controlled circuit comprises two or more digitally switched high-Q capacitors for coarse band tuning of the magnitude of the variable capacitance, the plurality of gain elements comprising a plurality of digitally controlled varactors providing for continuous tuning of the magnitude of the variable capacitance within a given coarse band.

11. An apparatus comprising:

a digitally controlled circuit having a variable capacitance; and

a controller configured to adjust a magnitude of the variable capacitance of the digitally controlled circuit;

wherein the digitally controlled circuit comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements;

wherein the controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements;

wherein the plurality of gain elements comprise high-Q switched capacitors; and

wherein each of the high-Q switched capacitors comprises a first switched capacitor controlled by a first transistor and a second switched capacitor controlled by a second transistor, the controller being configured to provide a same control voltage to each of the first transistor and the second transistor, the first transistor and the second transistor having different threshold voltages.

13. A phase-locked loop comprising:

a phase detector;

a filter having at least one input coupled to at least one output of the phase detector;

a controller having at least one input coupled to at least one output of the filter;

an oscillator having a variable capacitance, the oscillator having at least one input coupled to at least one output of the controller; and

a divider having at least one input coupled to at least one output of the oscillator and at least one output coupled to at least one input of the phase detector;

wherein the oscillator comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements; and

wherein the controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements

wherein the plurality of gain elements comprises two or more banks of gain elements; and

wherein control signals provided by the controller for gain elements in the two or more banks are offset from one another.

14. The phase-locked loop of claim 13, wherein the plurality of gain elements comprise varactors.

15. The phase-locked loop of claim 13 wherein the plurality of gain elements comprise high-Q switched capacitors.

21. The phase-locked loop of claim 15, wherein each of the high-Q switched capacitors comprises a first switched capacitor controlled by a first transistor and a second switched capacitor controlled by a second transistor, the controller being configured to provide a same control voltage to each of the first transistor and the second transistor, the first transistor and the second transistor having different threshold voltages.

22. The phase-locked loop of claim 13, wherein the magnitude of the offset of the control signals is based at least in part on the number of banks of gain elements.

23. The phase-locked loop of claim 13, further comprising:

first and second digital-to-analog converters providing respective first and second digital-to-analog control voltages responsive to control codes supplied by the controller;

a first plurality of switches configured to select one of the first digital-to-analog control voltage, a fixed high voltage and a fixed low voltage to connect to corresponding ones of a first one of the two or more banks of gain elements responsive to corresponding control signals from the controller;

a second plurality of switches configured to select one of the second digital-to-analog control voltage, the fixed high voltage and the fixed low voltage to connect to corresponding ones of a second one of the two or more banks of gain elements responsive to corresponding control signals from the controller;

wherein the controller is configured to adjust the control signals such that one of the gain elements in the first bank is supplied with the first digital-to-analog control voltage, one of the gain elements in the second bank is supplied with the second digital-to-analog control voltage, and remaining ones of the gain elements in the first bank and the second bank are supplied with the fixed high voltage or the fixed low voltage.

24. The phase-locked loop of claim 23, wherein at least one of the first and second digital-to-analog converters comprises a transfer function such that at least a top two control codes produce a same maximum voltage and at least a bottom two control codes produce a same minimum voltage.

25. The phase-locked loop of claim 13, wherein the oscillator comprises two or more digitally switched high-Q capacitors for coarse band tuning of the magnitude of the variable capacitance, the plurality of gain elements comprising a plurality of digitally controlled varactors providing for continuous tuning of the magnitude of the variable capacitance within a given coarse band.

16-20. -20. (canceled)