COMPRESSED SCAN CHAIN DIAGNOSIS BY INTERNAL CHAIN OBSERVATION, PROCESSES, CIRCUITS, DEVICES AND SYSTEMS
First Claim
1. Electronic scan circuitry comprising:
- (a) decompressor circuitry having a serial data input line and parallel data output lines;
(b) a first scan chain having a first scan chain input connected to one parallel data output line and having a first scan chain output;
(c) masking circuitry having a first masking input connected to the first scan chain output, the masking circuitry including;
(i) a first gate having a first input connected to the first masking input, a second input coupled to a qualify line, a third input, and a first masking output; and
(ii) a first register having a serial input and an output connected to the third input; and
(d) compactor circuitry having a first parallel compactor input connected to the first masking output and a serial compactor output.
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Accused Products
Abstract
Electronic scan circuitry includes a decompressor (510), a plurality of scan chains (520.i) fed by the decompressor (510), a scan circuit (502, 504) coupled to the plurality of scan chains (520.i) to scan them in and out, a masking circuit (590) fed by the scan chains (520.i), and a scannable masking qualification circuit (550, 560, 580) coupled to the masking circuit (590), the masking qualification circuit (550, 560, 580) scannable by scan-in of bits by the decompressor (510) along with scan-in of the scan chains (520.i), and the scannable masking qualification circuit (550, 560, 580) operable to hold such scanned-in bits upon scan-out of the scan chains through the masking circuit (590). Other scan circuitry, processes, circuits, devices and systems are also disclosed.
31 Citations
6 Claims
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1. Electronic scan circuitry comprising:
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(a) decompressor circuitry having a serial data input line and parallel data output lines; (b) a first scan chain having a first scan chain input connected to one parallel data output line and having a first scan chain output; (c) masking circuitry having a first masking input connected to the first scan chain output, the masking circuitry including; (i) a first gate having a first input connected to the first masking input, a second input coupled to a qualify line, a third input, and a first masking output; and (ii) a first register having a serial input and an output connected to the third input; and (d) compactor circuitry having a first parallel compactor input connected to the first masking output and a serial compactor output. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification