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DEVICES AND METHODS FOR REDUCING OR ELIMINATING MURA ARTIFACT ASSOCIATED WITH WHITE IMAGES

  • US 20160071452A1
  • Filed: 07/08/2015
  • Published: 03/10/2016
  • Est. Priority Date: 09/05/2014
  • Status: Abandoned Application
First Claim
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1. A method, comprising:

  • generating a first gate signal to be supplied to a first gate of a first transistor;

    generating a second gate signal to be supplied to a second gate of a second transistor; and

    adjusting a falling edge rate of the first gate signal to reduce a voltage drop associated with pixels of a display panel, wherein adjusting the falling edge rate of the first gate signal comprises decreasing the falling edge rate of the first gate signal during a period of time in which the first gate signal falls and the second gate signal rises to prevent an occurrence of an image artifact on the display panel.

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