SEMICONDUCTOR DEVICE

• US 20160071964A1
• Filed: 03/02/2015
• Published: 03/10/2016
• Est. Priority Date: 09/05/2014
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: KITAGAWA, MITSUHIKO
• Granted Patent: US 9,530,874 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 29/0619 with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0834 Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT

Abstract

A semiconductor device includes a first semiconductor region of a second conductivity type, and a second semiconductor region of a first conductivity type. A third semiconductor region of a first conductivity type is selectively provided on the second semiconductor region. A fourth semiconductor region of the first conductivity type and a fifth semiconductor region of the second conductivity type are selectively provided on the third semiconductor region. A first electrode is provided on a second insulating film within the second semiconductor region. A second electrode is in contact with the fifth semiconductor region and the third semiconductor region. The sixth semiconductor region is provided on the second semiconductor region at least in a portion thereon other than the area where the third semiconductor region is provided. The sixth semiconductor region is not in contact with the second electrode.

Claims

1. A semiconductor device comprising:

a first semiconductor region of a second conductivity type;

a second semiconductor region of a first conductivity type provided over the first semiconductor region;

a third semiconductor region of the second conductivity type selectively provided on the second semiconductor region;

a fourth semiconductor region of the first conductivity type selectively provided on the third semiconductor region;

a fifth semiconductor region of the second conductivity type selectively provided on the third semiconductor region;

a gate electrode disposed adjacent to the third semiconductor region with a first insulating film therebetween;

a first electrode extending inwardly of the second semiconductor region with a second insulating film therebetween, a portion of the second semiconductor region positioned between the gate electrode and the first electrode;

a second electrode in contact with the fifth semiconductor region and the fourth semiconductor region; and

a sixth semiconductor region of the second conductivity type extending inwardly of the second semiconductor region in at least apart of an area where the third semiconductor region is not provided, and not in contact with the second electrode.

2. The semiconductor device according to claim 1, wherein

a plurality of gate electrodes are provided,

the first electrode is provided between two adjacent gate electrodes, and

the sixth semiconductor region extends between two gate electrodes, one of which is also a gate electrode where the first electrode is provided between two gate electrodes.

3. The semiconductor device according to claim 1, wherein

a plurality of the first electrodes are provided,

the gate electrode is provided between two of the plurality of first electrodes, and

the sixth semiconductor region is located adjacent to one of the two of the plurality of first electrodes.

4. The semiconductor device according to claim 1, wherein a part of the second electrode is located adjacent to the third semiconductor region with the other part of the second insulating film.

5. The semiconductor device according to claim 1, further comprising:

a plurality of seventh semiconductor regions of the first conductivity type are selectively provided under the second semiconductor region, wherein

a plurality of the first semiconductor regions are provided under the second semiconductor region, and

each of the seventh semiconductor regions is provided between adjacent first semiconductor regions.

6. The semiconductor device according to claim 5, wherein

the gate electrode extends in a first direction,

the plurality of the first semiconductor regions and seventh semiconductor regions extend in a second direction which crosses the first direction.

7. The semiconductor device according to claim 6, wherein the first direction is orthogonal to the second direction.

8. The semiconductor device according to claim 6, wherein

the first semiconductor regions and the seventh semiconductor regions extend in a direction orthogonal to the extending direction of the sixth semiconductor region.

9. A semiconductor device, comprising:

a first doped semiconductor region of a first dopant type;

a plurality of second doped semiconductor regions of a second dopant type extending in a first direction on the first doped semiconductor layer;

a plurality of third doped semiconductor layers of the first dopant type located on the second doped semiconductor layer;

a plurality of fourth doped semiconductor layers of the second dopant type located on the second semiconductor layer between the third doped semiconductor regions;

a first electrode extending in the first direction and also inwardly of the first doped semiconductor region and between two second doped semiconductor regions;

a second electrode extending in the first direction and also inwardly of the first doped semiconductor region adjacent to the first of the second doped semiconductor regions on a side thereof opposed to the location of the first electrode

a third electrode extending in the first direction and inwardly of the first doped semiconductor region adjacent to the second of the second doped semiconductor regions on a side thereof opposed to the location of the first electrode, wherein one of the first electrode, or the second and third electrodes, terminate inwardly of the first semiconductor region below the location of the second semiconductor region thereon, and a first insulating layer extends thereover and along a portion of the side of the second doped semiconductor layer.

10. The semiconductor device of claim 9, further comprising a fourth electrode extending over the first, second and third electrodes, and in contact with the first insulating layer covering the one of the first electrode, or the second and third electrodes, terminating inwardly of the first semiconductor region below the location of the second semiconductor region.

11. The semiconductor device of claim 10, wherein the fourth electrode contacts the portion of the side of the second semiconductor region not covered by the first insulating layer.

12. The semiconductor device of claim 10, further comprising:

a fifth doped semiconductor region of the second conductivity type disposed on the first semiconductor region and between the first semiconductor region and fourth electrode; and

a second insulating layer extending between the fifth doped semiconductor region and the fourth electrode.

13. The semiconductor device of claim 12, wherein;

a plurality of sets of first, second and third electrodes are provided, and the fifth doped semiconductor region extends between a second electrode of a first set of first, second and third electrodes and a third electrode of a second set of first, second and third electrodes.

14. The semiconductor device of claim 12, wherein the first electrode is a gate electrode.

15. The semiconductor device of claim 12, wherein the second and third electrodes are gate electrodes.

16. The semiconductor device of claim 12, further comprising a plurality of sixth doped semiconductor regions of the second type located on a side of the first doped semiconductor layer opposite to the side on which the second semiconductor layer is located.

17. The semiconductor device of claim 16, wherein the sixth semiconductor layers extend in a direction crossing the first direction.

18. A semiconductor device, comprising:

a drift layer doped to a first conductivity type;

a plurality of pairs of base regions doped to a second conductivity type disposed on the drift region, and a first electrode extending inwardly of the drift layer at a location between at least a pair of base regions of the plurality of pairs of base regions;

a pair of second electrodes extending inwardly of the drift layer, one electrode of the second electrode pair extending along the side of each base layer of the pairs of base layers on the side thereof opposed to the location of the first electrode; and

a semiconductor layer doped to a second conductivity type opposite to the first conductivity type located on the drift layer in and extending between adjacent pairs of base layers, wherein

the distance between the electrodes of the second pair of electrodes is less than the expanse of the semiconductor layer doped to a second conductivity type in the direction extending between adjacent pairs of base layers.

19. The semiconductor device of claim 18, wherein

one of the first electrode or the electrodes of the second pair of electrodes form a buried electrode which does not extend above the interface of the drift layer and base layer, and

a first insulating layer extends between the buried electrode and the adjacent drift layer and along a portion of a side of the base layer above the buried electrode.

20. The semiconductor device of claim 19, wherein one of the first electrode, or the electrodes of the second pair of electrodes, is a gate electrode.