EMBEDDED OVERLOAD PROTECTION IN DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTERS

• US 20160072275A1
• Filed: 09/04/2014
• Published: 03/10/2016
• Est. Priority Date: 09/04/2014
• Status: Active Grant

• Current Assignee: Analog Devices International Unlimited Company (Analog Devices, Inc.)
• Original Assignee: Analog Devices Technology (Analog Devices, Inc.)
• Inventors: CALDWELL, TREVOR CLIFFORD, ALLDRED, DAVID NELSON, SHIBATA, HAJIME, PETERSEN, COREY
• Granted Patent: US 9,912,144 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H02H 7/12 for static converters or rectifiers for discharge lamp power supplies using static converters H05B41/2851, H05B41/2921, H05B41/2981
• CPC Class Codes: H03M 3/30 Delta-sigma modulation
• CPC Class Codes: H03M 3/36 by temporarily adapting the operation upon detection of instability conditions
• CPC Class Codes: H03M 3/464 Details of the digital/analogue conversion in the feedback path
• CPC Class Codes: H03M 3/484 by adapting the gain of the feedback signal, e.g. by adapting the reference values of the digital/analogue converter in the feedback path

Abstract

Delta-sigma modulators do not handle overload well, and often become unstable if the input goes beyond the full-scale range of the modulator. To provide overload protection, an improved technique embeds an overload detector in the delta sigma modulator. When an overload condition is detected, coefficient(s) of the delta sigma modulator is adjusted to accommodate for the overloaded input. The improved technique advantageously allows the delta sigma modulator to handle overload gracefully without reset, and offers greater dynamic range at reduced resolution. Furthermore, the coefficient(s) of the delta sigma modulator can be adjusted in such a way to ensure the noise transfer function is not affected.

Claims

1. A method for providing overload protection embedded in a delta-sigma modulator, the method comprising:

detecting an overload condition in the delta-sigma modulator using a overload detector connected to one or more nodes in the delta-sigma modulator; and

in response to detecting the overload condition, adjusting one or more coefficients of the delta-sigma modulator to compensate for the detected overload condition, wherein a first coefficient of the one or more coefficients corresponds to a current gain of a feedback digital-to-analog converter of the delta-sigma modulator.

2. The method of claim 1, wherein:

wherein an overload condition is detected if a signal level at the one or more nodes is above a first threshold or below a second threshold.

3. The method of claim 1, wherein:

adjusting the one or more coefficients of the delta-sigma modulator to compensate for the detected overload condition comprises determining one or more coefficients such that a gain of a signal transfer function of the delta-sigma modulator changes while a noise transfer function of the delta-sigma modulator or a loop gain of the delta-sigma modulator remains substantially unchanged.

4. The method of claim 1, wherein:

a second coefficient of the one or more coefficients corresponds to a gain of an integrator or LC buffer of the delta-sigma modulator.

5. The method of claim 1, wherein:

adjusting the first coefficient corresponding to the current gain of the feedback digital-to-analog converter of the delta-sigma modulator to increase the current gain and adjusting a second coefficient corresponding to the gain of the integrator or LC buffer of the delta-sigma modulator to substantially preserve a loop gain of the delta-sigma modulator.

6. The method of claim 4, wherein:

adjusting the second coefficient comprises adjusting a size of a feedback capacitor of an amplifier of the delta-sigma modulator.

7. The method of claim 1, wherein:

a third coefficient of the one or more coefficients corresponds to a size of a resistor at an output of an amplifier of the delta-sigma modulator.

8. The method of claim 1, wherein:

adjusting the one or more coefficients comprises adjusting the first coefficient corresponding to the current gain of the feedback digital-to-analog converter and adjusting a third coefficient corresponding to a size of a resistor at an output of an amplifier of the delta-sigma modulator to increase the size of the resistor.

9. The method of claim 1, wherein:

the one or more coefficients are adjusted while the delta-sigma modulator is operating to convert an input analog signal into a digital signal.

10. The method of claim 1, further comprising:

determining whether the delta-sigma modulator has exited the overload condition for a period of time; and

in response to determining the delta-sigma modulator has exited the overload condition for the period of time, adjusting the one or more coefficients to decrease compensation for the overload condition.

11. The method of claim 10, wherein determining whether the delta-sigma modulator has exited the overload condition comprises determining whether a digital output of the delta-sigma modulator is within a normal range for the period of time.

12. The method of claim 10, wherein determining whether the delta-sigma modulator has exited the overload condition comprises determining whether one or more signal levels of the one or more nodes of the delta-sigma modulator is within a normal range for the period of time.

13. The method of claim 1, further comprising:

in response to detecting the overload condition, adjusting a digital gain of a digital output of the delta-sigma modulator in accordance with a predetermined time delay from the adjustment of the one or more coefficients of the delta-sigma modulator, wherein the digital gain corresponds to gain change in a signal transfer function of the delta-sigma modulator resulting from the adjustment of the one or more coefficients of the delta-sigma modulator.

14. An apparatus for providing overload protection, said apparatus embedded in a delta-sigma modulator, the apparatus comprising:

a overload detector connected to one or more nodes in the delta-sigma modulator for detecting an overload condition in the delta-sigma modulator; and

a coefficient controller for adjusting one or more coefficients of the delta-sigma modulator to compensate for the detected overload condition in response to detecting the overload condition, wherein a first coefficient of the one or more coefficients corresponds to a current gain of a feedback digital-to-analog converter of the delta-sigma modulator.

15. The apparatus of claim 14, wherein the one or more nodes include an input node to a front-end of the delta-sigma modulator.

16. The apparatus of claim 14, wherein the one or more nodes include an output node of an integrator or LC buffer of the delta-sigma modulator.

17. The apparatus of claim 14, wherein the one or more nodes include an output of an analog-to-digital converter of the delta-sigma modulator.

18. The apparatus of claim 14, wherein the one or more nodes include one or more nodes of a first stage of the delta-sigma modulator and one or more nodes of a second stage of the delta-sigma modulator.

19. The apparatus of claim 14, wherein the overload detector detects an overload condition based on signal levels at a plurality ones of the one or more nodes in the delta-sigma modulator.

20. The apparatus of claim 14, further comprising:

a return to normal detector for;

determining whether the delta-sigma modulator has exited the overload condition for a period of time; and

in response to determining the delta-sigma modulator has exited the overload condition for the period of time, signaling to the coefficient controller to adjust the one or more coefficients to decrease compensation for the overload condition.