SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

• US 20160079224A1
• Filed: 11/18/2015
• Published: 03/17/2016
• Est. Priority Date: 09/16/2011
• Status: Active Grant

• Current Assignee: Socionext Inc.
• Original Assignee: Socionext Inc.
• Inventors: Usami, Shiro
• Granted Patent: US 9,385,113 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 23/528 Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 23/5286 Arrangements of power or ground buses
• CPC Class Codes: H01L 27/0248 for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
• CPC Class Codes: H01L 27/0251 for MOS devices
• CPC Class Codes: H01L 27/0255 using diodes as protective elements
• CPC Class Codes: H01L 27/0259 using bipolar transistors as protective elements
• CPC Class Codes: H01L 27/0262 including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices
• CPC Class Codes: H01L 27/0266 using field effect transistors as protective elements
• CPC Class Codes: H01L 27/0288 using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
• CPC Class Codes: H01L 27/0292 using a specific configuration of the conducting means connecting the protective devices, e.g. ESD buses
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 29/87 Thyristor diodes, e.g. Shockley diodes, break-over diodes

Abstract

Diffusion regions having the same conductivity type are arranged on a side of a second wiring and a side of a third wiring, respectively under a first wiring connected to a signal terminal. Diffusion regions are separated in a whole part or one part of a range in a Y direction. That is, under first wiring, diffusion regions are only formed in parts opposed to diffusion regions formed under the second wiring and third wiring connected to a power supply terminal or a ground terminal, and a diffusion region is not formed in a central part in an X direction. Therefore, terminal capacity of the signal terminal can be reduced without causing ESD resistance to be reduced, in an ESD protection circuit with the signal terminal.

Claims

1-19. -19. (canceled)

20. A semiconductor integrated circuit device having an ESD (Electro Static Discharge) protection circuit, wherein:

the ESD protection circuit comprises;

a first wiring extending in a first direction and electrically connected to a first terminal;

a second wiring and a third wiring extending in the first direction, electrically connected to a second terminal, and disposed on both sides of the first wiring respectively;

a fourth wiring extending in the first direction and electrically connected to the first terminal;

a fifth wiring extending in the first direction and electrically connected to the second terminal;

a first diffusion region and a second diffusion region that are connected to and formed under the first wiring, having a same first conductivity type with each other, disposed between the second wiring and the third wiring, in a second direction perpendicular to the first direction, the first and second diffusion regions being at least partially separated from each other;

a third diffusion region connected to and formed under the second wiring, having a second conductivity type, and disposed so as to be opposed to the first diffusion region in the second direction;

a fourth diffusion region connected to and formed under the third wiring, having the second conductivity type, and disposed so as to be opposed to the second diffusion region in the second direction;

a fifth diffusion region and a sixth diffusion region that are connected to and formed under the fourth wiring, having the first conductivity type, disposed between the third wiring and the fifth wiring in the second direction, the fifth and sixth diffusion regions being at least partially separated from each other; and

a seventh diffusion region connected to and formed under the fifth wiring, having the second conductivity type, and disposed so as to be opposed to the sixth diffusion region in the second direction,

the third diffusion region, the first diffusion region, the second diffusion region, the fourth diffusion region, the fifth diffusion region, the sixth diffusion region and the seventh diffusion region are disposed in this order in the second direction,

the second wiring, the first wiring, the third wiring, the fourth wiring and the fifth wiring are disposed in this order in the second direction, and

the first conductivity type is different from the second conductivity type.

21. The semiconductor integrated circuit device according to claim 20, wherein

each of the first, second, third, fourth, fifth, sixth, and seventh diffusion regions has a rectangular shape of which length in the first direction are greater than a length in the second direction.

22. The semiconductor integrated circuit device according to claim 20, wherein

a length of each of the first, second, fifth and sixth diffusion regions in the second direction is smaller than a length of each of the third, fourth and seventh diffusion regions in the second direction.

23. The semiconductor integrated circuit device according to claim 20, wherein:

the third and fourth diffusion regions are connected to each other through a first connective diffusion region, and

the fourth and seventh diffusion region are connected to each other through a second connective diffusion region.

24. The semiconductor integrated circuit device according to claim 20, wherein:

a space between the first wiring and the second wiring is larger than a space between the first diffusion region and the third diffusion region,

a space between the first wiring and the third wiring is larger than a space between the second diffusion region and the fourth diffusion region,

a space between the third wiring and the fourth wiring is larger than a space between the fourth diffusion region and the fifth diffusion region, and

a space between the fourth wiring and the fifth wiring is larger than a space between the sixth diffusion region and the seventh diffusion region.

25. The semiconductor integrated circuit device according to claim 20, wherein

the second terminal is a power supply terminal or a ground terminal.

26. The semiconductor integrated circuit device according to claim 20, wherein:

the first conductivity type is either one of a P type and an N type, and the second conductivity type is another of the P type and the N type, and

the ESD protection circuit is a diode type.

27. The semiconductor integrated circuit device according to claim 20, wherein:

the first and second diffusion regions are separated from each other, and

the fifth and sixth diffusion regions are separated from each other.

28. The semiconductor integrated circuit device according to claim 23, wherein

each of the first, second, third, fourth, fifth, sixth, and seventh diffusion regions has a rectangular shape of which length in the first direction are greater than a length in the second direction.

29. The semiconductor integrated circuit device according to claim 23, wherein

a length of each of the first, second, fifth and sixth diffusion regions in the second direction is smaller than a length of each of the third, fourth and seventh diffusion regions in the second direction.

30. The semiconductor integrated circuit device according to claim 23, wherein:

a space between the first wiring and the second wiring is larger than a space between the first diffusion region and the third diffusion region,

a space between the first wiring and the third wiring is larger than a space between the second diffusion region and the fourth diffusion region,

a space between the third wiring and the fourth wiring is larger than a space between the fourth diffusion region and the fifth diffusion region, and

a space between the fourth wiring and the fifth wiring is larger than a space between the sixth diffusion region and the seventh diffusion region.

31. The semiconductor integrated circuit device according to claim 23, wherein

the second terminal is a power supply terminal or a ground terminal.

32. The semiconductor integrated circuit device according to claim 23, wherein:

the first conductivity type is either one of a P type and an N type, and the second conductivity type is another of the P type and the N type, and

the ESD protection circuit is a diode type.

33. The semiconductor integrated circuit device according to claim 23, wherein:

the third and fourth diffusion regions are connected to each other through two diffusion regions included in the first connective diffusion region so as to surround the first and second diffusion regions, and

the fourth and seventh diffusion region are connected to each other through two diffusion regions included in the second connective diffusion region so as to surround the fifth and sixth diffusion regions.

34. The semiconductor integrated circuit device according to claim 20, wherein:

the first and second diffusion regions are connected to the first wiring via first contacts,

the third diffusion region is connected to the second wiring via second contacts,

the fourth diffusion region is connected to the third wiring via third contacts,

the fifth and sixth diffusion regions are connected to the fourth wiring via fourth contacts, and

the seventh diffusion region is connected to the fifth wiring via fifth contacts.

35. The semiconductor integrated circuit device according to claim 23, wherein:

the first and second diffusion regions are connected to the first wiring via first contacts,

the third diffusion region is connected to the second wiring via second contacts,

the fourth diffusion region is connected to the third wiring via third contacts,

the fifth and sixth diffusion regions are connected to the fourth wiring via fourth contacts, and

the seventh diffusion region is connected to the fifth wiring via fifth contacts.