Body Biasing for RF Switch Optimization

• US 20160085256A1
• Filed: 09/23/2014
• Published: 03/24/2016
• Est. Priority Date: 02/18/2014
• Status: Abandoned Application

• Current Assignee: ACCO Brands USA LLC (ACCO Brands Incorporated)
• Original Assignee: ACCO Brands USA LLC (ACCO Brands Incorporated)
• Inventors: Cam, Herve, Blamon, Guillaume
• Application Number:
  US14/493,695
• Publication Number:
  US 20160085256A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G05F 3/205 Substrate bias-voltage generators for static stores G11C5/146
• CPC Class Codes: G05F 3/247 producing a voltage or current as a predetermined function of the supply voltage
• CPC Class Codes: H01Q 1/50 Structural association of antennas with earthing switches, lead-in devices or lightning protectors
• CPC Class Codes: H03K 17/162 without feedback from the output circuit to the control circuit
• CPC Class Codes: H03K 17/6872 using complementary field-effect transistors
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H03K 2217/0009 AC switches, i.e. delivering AC power to a load
• CPC Class Codes: H03K 2217/0018 Special modifications or use of the back gate voltage of a FET
• CPC Class Codes: H03K 2217/0054 Gating switches, e.g. pass gates
• CPC Class Codes: H03K 2217/0081 Power supply means, e.g. to the switch driver

Abstract

Switches comprising a number of transistors in series achieve improved performance through biasing the bodies of the transistors to lower the stack resistance in the ON mode and optionally to also lower the stack capacitance in the OFF mode. These switches find use in RF applications such as phase shifters, step attenuators, and in antenna switches, for example. In some embodiments, a bias network is used to alternatingly provide a positive bias voltage or a negative bias voltage to the bodies of the transistors.

Claims

1. A switch comprising:

a plurality of transistors arranged in series, each transistor of the plurality of transistors including a source, a drain, a channel disposed therebetween, and a gate to control the channel;

a first bias network configured to bias the gates of the plurality of transistors; and

a second bias network configured to bias the channels of the plurality of transistors.

2. The switch of claim 1 wherein the second bias network includes a resistor for each transistor of the plurality of transistors, wherein the resistors are arranged in series, wherein each resistor has a proximal end and a distal end, wherein each distal end of each resistor is associated with a node, and wherein each said node biases the channel of the corresponding transistor.

3. The switch of claim 1 wherein the second bias network includes a first diode, the first diode being forward biased.

4. The switch of claim 3 wherein the second bias network further includes second and third diodes in series with the first diode, the second and third diodes also being forward biased.

5. The switch of claim 3 further comprising a second diode arranged in parallel to the first diode, the second diode being reverse biased.

6. The switch of claim 1 further comprising a DC control configured to supply a variable bias voltage, wherein the first and second bias networks are configured to both receive the same variable bias voltage from the DC control.

7. The switch of claim 1 further comprising, for each transistor, a ladder resistor connected in parallel between the source and the drain of the transistor.

8. The switch of claim 1 wherein the switch is defined in CMOS.

9. The switch of claim 1 wherein the switch is defined on a silicon-on-insulator die.

10. An RF device comprising:

a plurality of power amplifiers;

an antenna; and

an antenna switch configured to couple one of the plurality of power amplifiers at a time to the antenna, the antenna switch including, for each power amplifier, a serial switch comprising

a plurality of transistors arranged in series, each transistor of the plurality of transistors including a source, a drain, a channel disposed therebetween, and a gate to control the channel,

a first bias network configured to bias the gates of the plurality of transistors, and

a second bias network configured to bias the channels of the plurality of transistors.

11. The RF device of claim 10 wherein the second bias network includes a resistor for each transistor of the plurality of transistors, wherein the resistors are arranged in series, wherein each resistor has a proximal end and a distal end, wherein each distal end of each resistor is associated with a node, and wherein each said node biases the channel of the corresponding transistor.

12. The RF device of claim 10 wherein the second bias network includes a first diode, the first diode being forward biased.

13. The RF device of claim 12 wherein the second bias network further includes second and third diodes in series with the first diode, the second and third diodes also being forward biased.

14. The RF device of claim 12 further comprising a second diode arranged in parallel to the first diode, the second diode being reverse biased.

15. The RF device of claim 10 further comprising a DC control configured to supply a variable bias voltage, wherein the first and second bias networks are configured to both receive the same variable bias voltage from the DC control.

16. The RF device of claim 10 further comprising, for each transistor, a ladder resistor connected in parallel between the source and the drain of the transistor.

17. The RF device of claim 10 wherein the switch is defined in CMOS.

18. The RF device of claim 10 wherein the switch is defined on a silicon-on-insulator die.