SEMICONDUCTOR DEVICE WITH BURIED BIT LINE AND METHOD FOR FABRICATING THE SAME

• US 20160086957A1
• Filed: 12/08/2015
• Published: 03/24/2016
• Est. Priority Date: 08/28/2012
• Status: Active Grant

• Current Assignee: SK Hynix Inc.
• Original Assignee: SK Hynix Inc.
• Inventors: CHO, Heung-Jae, HWANG, Eui-Seong, PARK, Eun-Shil
• Granted Patent: US 9,379,117 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence
• CPC Class Codes: H10B 12/053 the transistor being at least partially in a trench in the substrate vertical transistor in combination with a capacitor formed in a substrate trench H10B12/0383
• CPC Class Codes: H10B 12/315 with the capacitor higher than a bit line
• CPC Class Codes: H10B 12/482 Bit lines

Abstract

A method for fabricating a semiconductor device includes etching semiconductor substrate to form bulb-type trenches that define a plurality of active regions in the semiconductor substrate; forming a supporter in each of the bulb-type trenches; dividing each active region, of the plurality of active regions, into a pair of body lines by forming a trench through each active region; and forming a bit line in each body line of the pair of body lines.

Claims

1-5. -5. (canceled)

6. A method for fabricating a semiconductor device, the method comprising:

etching a semiconductor substrate to form bulb-type trenches that define a plurality of active regions in the semiconductor substrate;

forming a supporter in each of the bulb-type trenches;

dividing each active region, of the plurality of active regions, into a pair of body lines by forming a trench through each active region; and

forming a bit line in each body line of the pair of body lines,

wherein the dividing of each active region into a pair of body lines comprises;

partially etching a thickness of each active region to form the trenches;

forming spacers on sidewalls of the trenches;

etching surfaces of the plurality of active regions that define bottom surfaces of the trenches to increase a depth of the trenches; and

etching sidewalls, which define the trenches, of the pair of body lines to form recessed lower sidewalls extending in a direction perpendicular to a longitudinal direction of the trenches.

7. The method of claim 6, further comprising:

forming a conductive layer in the trenches so that the recessed lower sidewalls are buried by the conductive layer; and

removing the conductive layer from the trenches, except for the recessed lower sidewalls to form buried bit lines in the recessed lower sidewalls of the body lines.

8. A method for fabricating a semiconductor device, the method comprising:

forming an insulation layer on a semiconductor substrate;

forming a conductive layer on the insulation layer;

etching the conductive layer to form first trenches that define a plurality of active regions;

forming a supporter in each of the trenches;

dividing each active region, of the plurality of active regions, into a pair of body lines by forming a second trench through each active region; and

forming a bit line in each body line of the pair of body lines.

9. The method of claim 8, further comprising:

after forming the bit lines, etching the pair of the body lines to form a pair of pillars, where the pair of pillars each include channel region; and

forming a capacitor connected to an upper portion of each pillar.

10. The method of claim 8, wherein the supporters comprise an insulation material.

11. The method of claim 8, wherein the dividing of each active region into a pair of body lines comprises:

partially etching a thickness of each active region to form the second trenches;

forming spacers on sidewalls of the second trenches; and

etching surfaces of the plurality of active regions that define bottom surfaces of the second trenches to form recessed lower sidewalls extending in a direction perpendicular to a longitudinal direction of the second trenches.

12. The method of claim 11, further comprising:

forming a metal layer in the trenches so that the recessed lower sidewalls are buried by the metal layer; and

removing the metal layer from the trenches, except for the recessed lower sidewalls, to form buried bit lines in the recessed lower sidewalls of the body lines.

13-21. -21. (canceled)