MOS DEVICE WITH ISLAND REGION

• US 20160087093A1
• Filed: 12/07/2015
• Published: 03/24/2016
• Est. Priority Date: 02/11/2005
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: Alpha & Omega Semiconductor, Ltd.
• Inventors: Bhalla, Anup, Wang, Xiaobin, Pan, Ji, Wei, Sung-Po
• Granted Patent: US 10,074,742 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/26513 of electrically active species
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 29/0623 Buried supplementary region, e.g. buried guard ring multi-RESURF H01L29/0634
• CPC Class Codes: H01L 29/1083 with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/165 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/41741 for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/47 Schottky barrier electrodes H01L29/435 takes precedence
• CPC Class Codes: H01L 29/66143 Schottky diodes
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7809 having both source and drain contacts on the same surface, i.e. Up-Drain VDMOS transistors
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/8725 of the trench MOS barrier type [TMBS]

Abstract

A semiconductor device formed on a semiconductor substrate, comprising: an epitaxial layer overlaying the semiconductor substrate; a drain formed on back of the semiconductor substrate; a drain region that extends into the epitaxial layer; an active region; and an island region under the contact trench and disconnected from the body, the island region having an opposite polarity as the epitaxial layer. The active region comprises: a body disposed in the epitaxial layer; a source embedded in the body; a gate trench extending into the epitaxial layer; a gate disposed in the gate trench; an active region contact trench extending through the source and the body; and an active region contact electrode disposed within the active region contact trench.

Claims

1. A semiconductor device formed on a semiconductor substrate, comprising:

an epitaxial layer overlaying the semiconductor substrate;

a drain formed on back of the semiconductor substrate;

a drain region that extends into the epitaxial layer;

an active region comprising;

a body disposed in the epitaxial layer;

a source embedded in the body;

a gate trench extending into the epitaxial layer;

a gate disposed in the gate trench;

an active region contact trench extending through the source and the body; and

an active region contact electrode disposed within the active region contact trench; and

an island region under the active region contact trench and disconnected from the body, the island region having an opposite polarity as the epitaxial layer.

2. The semiconductor device of claim 1, further comprising a Schottky barrier controlling layer disposed in the epitaxial layer adjacent to the active region contact trench.

3. The semiconductor device of claim 2, wherein the Schottky barrier controlling layer is disposed adjacent to a lower portion of the active region contact trench.

4. The semiconductor device of claim 1, wherein the gate trench is a first gate trench;

and

the semiconductor device further comprising a gate region comprising;

a second gate trench extending into the epitaxial layer;

a second gate disposed in the gate trench; and

a gate contact trench formed within the second gate.

5. The semiconductor device of claim 4, wherein the active region contact trench has a different depth than the gate contact trench.

6. The semiconductor device of claim 1, wherein the active region contact trench has a non-uniform depth.

7. The semiconductor device of claim 1, wherein:

the active region contact trench has a first depth and a second depth;

the first depth is shallower than the second depth; and

a first contact opening corresponding to the first depth is wider than a second contact opening corresponding to the second depth.

8. The semiconductor device of claim 1, further comprising an anti-punch through implant disposed on a sidewall of the active region contact trench.

9. The semiconductor device of claim 8, further comprising a Schottky barrier controlling layer disposed in the epitaxial layer adjacent to the active region contact trench;

and

wherein the anti-punch through implant is disposed above the Schottky barrier controlling layer.

10. The semiconductor device of claim 1, further comprising a blanket implant deposited throughout the epitaxial layer, wherein the blanket implant has opposite polarity as the epitaxial layer.

11. The semiconductor device of claim 1, further comprising an epitaxial layer profile tuning implant deposited under the active region contact trench.

12. A method of fabricating a semiconductor device, comprising:

forming a gate trench in an epitaxial layer overlaying a semiconductor substrate;

depositing gate material in the gate trench;

forming a body;

forming a source;

forming an active region contact trench that extends through the source and the body;

forming an island region under the active region contact trench and disconnected from the body, the island region having an opposite polarity as the epitaxial layer; and

disposing a contact electrode within the active region contact trench.

13. The method of claim 12, further comprising forming a Schottky barrier controlling layer in the epitaxial layer in bottom region of the active region contact trench, the Schottky barrier controlling layer being formed at least in part by ion implantation.

14. The method of claim 13, wherein forming the Schottky barrier controlling layer includes depositing a layer of material doped with an opposite polarity dopant as the epitaxial layer, in the epitaxial layer in the bottom region of the active region contact trench.

15. The method of claim 12, wherein:

the gate trench is a first gate trench; and

the method further comprises forming a gate region, including by;

forming a second gate trench extending into the epitaxial layer;

forming a second gate disposed in the gate trench; and

forming a gate contact trench formed within the second gate.

16. The method of claim 12, wherein at least a portion of the active region contact trench has a different depth than the gate contact trench.

17. The method of claim 12, wherein the active region contact trench has a non-uniform depth.

18. The method of claim 12, wherein:

the active region contact trench is formed to have a first depth and a second depth;

the first depth is shallower than the second depth; and

a first contact opening corresponding to the first depth is wider than a second contact opening corresponding to the second depth.

19. The method of claim 12, further comprising depositing a blanket implant throughout the epitaxial layer, wherein the blanket implant has opposite polarity as the epitaxial layer.

20. The method of claim 12, further comprising forming an epitaxial layer profile tuning implant deposited under the active region contact trench.