TOUCH SENSING DEVICE AND DRIVING METHOD THEREOF

• US 20160092027A1
• Filed: 12/30/2014
• Published: 03/31/2016
• Est. Priority Date: 09/26/2014
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: KIM, Beomjin, LEE, Dukhyo
• Granted Patent: US 9,927,930 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G02F 1/13338 Input devices, e.g. touch panels
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/04184 Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally
• CPC Class Codes: G06F 3/0446 using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes

Abstract

A touch sensing device includes a panel including pixels disposed in a matrix form defined by data lines and gate lines, the pixels including thin film transistors (TFTs). The touch sensing device includes at least one touch sensor having a mutual capacitance and a sensor driving circuit configured to receive an electric charge from the mutual capacitance. The touch sensing device further includes a display driving circuit configured to supply a first parasitic capacitance suppressing signal to the data lines and a second parasitic capacitance suppressing signal to the gate lines during a touch sensor driving period.

Claims

1. A touch sensing device comprising:

a panel including pixels disposed in a matrix form defined by data lines and gate lines, the pixels including thin film transistors (TFTs);

at least one touch sensor having a mutual capacitance;

a sensor driving circuit configured to receive an electric charge from the mutual capacitance; and

a display driving circuit configured to supply a first parasitic capacitance suppressing signal to the data lines and a second parasitic capacitance suppressing signal to the gate lines during a touch sensor driving period.

2. The touch sensing device of claim 1, wherein the display driving circuit is configured to provide the first and second parasitic capacitance suppressing signals to the data lines in phase with a touch driving signal, and to set voltage levels of the first and second parasitic capacitance suppressing signals in proportion to an overall parasitic capacitance of the panel.

3. The touch sensing device of claim 2, wherein the voltage levels of the first and second parasitic capacitance suppressing signals are lower than a voltage of the touch driving signal.

4. The touch sensing device of claim 1, wherein the sensor driving circuit comprises an integrator configured to output an output voltage based on a remaining parasitic capacitance of the panel after the application of the first and second parasitic capacitance suppressing signals, and on a reference voltage,

wherein the display driving circuit is configured to modify a voltage level of at least one of the first and second parasitic capacitance suppressing signals based on the remaining parasitic capacitance of the panel calculated and on the output voltage from the integrator.

5. The touch sensing device of claim 4, wherein the display driving circuit is configured to modify the voltage level of at least one of the first and second parasitic capacitance suppressing signals based on an equation:

V_LFDH=V_MOD×

{1+(Cp_—

r/Cp_—

t)},

wherein VLFDH denotes a modified voltage level of at least one of the first and second parasitic capacitance suppressing signals, V_MOD denotes the reference voltage, Cp_r denotes the remaining parasitic capacitance of the panel, and Cp_t denotes a total parasitic capacitance of the panel.

6. The touch sensing device of claim 1, wherein the at least one touch sensor includes the mutual capacitance disposed between a touch sensor transmission line and a touch sensor reception line intersecting each other, and

wherein the sensor driving circuit is configured to provide a third parasitic capacitance suppressing signal in phase with the first and second parasitic capacitance suppressing signals to the touch reception line during the touch sensor driving period.

7. The touch sensing device of claim 6, wherein the gate pulse is swung between a gate high voltage higher than a threshold voltage of the TFTs and a gate low voltage lower than the threshold voltage of the TFTs, and the voltage of at least one of the first, second, and third parasitic capacitance suppressing signals is lower than the gate high voltage.

8. The touch sensing device of claim 1, wherein the panel includes the at least one touch sensor.

9. A touch screen display device comprising:

a display panel including at least one touch sensor having a mutual capacitance and pixels disposed in a matrix form defined by data lines and gate lines, the pixels including thin film transistors (TFTs);

a sensor driving circuit configured to receive an electric charge from the mutual capacitance; and

a display driving circuit configured to supply a data voltage of an input image to the data lines and a gate pulse to the gate lines during a display driving period, and to supply a first parasitic capacitance suppressing signal to the data lines and a second parasitic capacitance suppressing signal to the gate lines during a touch sensor driving period.

10. The touch screen display device of claim 9, wherein the display driving circuit is configured to provide the first and second parasitic capacitance suppressing signals to the data lines in phase with a touch driving signal, and to set voltage levels of the first and second parasitic capacitance suppressing signals in proportion to an overall parasitic capacitance of the display panel.

11. The touch screen display device of claim 10, wherein the voltage levels of the first and second parasitic capacitance suppressing signals are lower than a voltage of the touch driving signal.

12. The touch screen display device of claim 9, wherein the sensor driving circuit comprises an integrator configured to output an output voltage based on a remaining parasitic capacitance of the panel after the application of the first and second parasitic capacitance suppressing signals, and on a reference voltage,

wherein the display driving circuit is configured to modify a voltage level of at least one of the first and second parasitic capacitance suppressing signals based on the remaining parasitic capacitance of the panel calculated and on the output voltage from the integrator.

13. The touch screen display device of claim 12, wherein the display driving circuit is configured to modify the voltage level of at least one of the first and second parasitic capacitance suppressing signals based on an equation:

V_LFDH=V_MOD×

{1+(Cp_—

r/Cp_—

t)},

wherein VLFDH denotes a modified voltage level of at least one of the first and second parasitic capacitance suppressing signals, V_MOD denotes the reference voltage, Cp_r denotes the remaining parasitic capacitance of the panel, and Cp_t denotes a total parasitic capacitance of the panel.

14. The touch screen display device of claim 9, wherein the at least one touch sensor includes the mutual capacitance disposed between a touch sensor transmission line and a touch sensor reception line intersecting each other, and

wherein the sensor driving circuit is configured to provide a third parasitic capacitance suppressing signal in phase with the first and second parasitic capacitance suppressing signals to the touch reception line during the touch sensor driving period.

15. The touch screen display device of claim 14, wherein the gate pulse is swung between a gate high voltage higher than a threshold voltage of the TFTs and a gate low voltage lower than the threshold voltage of the TFTs, and the voltage of at least one of the first, second, and third parasitic capacitance suppressing signals is lower than the gate high voltage.

16. A method of driving a touch sensing device having a panel with at least one touch sensor and pixels disposed in a matrix form defined by data lines and gate lines, the method comprising:

supplying a first parasitic capacitance suppressing signal to the data lines and a second parasitic capacitance suppressing signal to the gate lines;

determining a remaining amount of electric charge in the panel; and

if the remaining amount of electric charge exceeds a threshold amount, modifying a voltage level of at least one of the first and second parasitic capacitance suppressing signals based on the remaining parasitic capacitance.

17. The method of claim 16, wherein the threshold amount is zero.

18. The method of claim 16, wherein the modifying includes setting the voltage level of at least one of the first and second parasitic capacitance suppressing signals based on an equation:

V_LFDH=V_MOD×

{1+(Cp_—

r/Cp_—

t)},

wherein VLFDH denotes a modified voltage level of at least one of the first and second parasitic capacitance suppressing signals, V_MOD denotes a reference voltage, Cp_r denotes the remaining parasitic capacitance of the panel, and Cp_t denotes a total parasitic capacitance of the panel.