STORAGE DEVICE AND OPERATING METHOD OF STORAGE DEVICE

• US 20160093394A1
• Filed: 09/17/2015
• Published: 03/31/2016
• Est. Priority Date: 09/26/2014
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Ju Seok Lee
• Inventors: LEE, JU SEOK
• Granted Patent: US 9,431,122 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 7/588 Random number generators, i.e. based on natural stochastic processes
• CPC Class Codes: G09C 1/00 Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system cryptographic typewriters G09C3/00
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/08 Address circuits; Decoders; Word-line control circuits
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/16 for erasing blocks, e.g. arrays, words, groups
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/3422 Circuits or methods to evaluate read or write disturbance in nonvolatile memory, without steps to mitigate the problem
• CPC Class Codes: G11C 16/3445 Circuits or methods to verify correct erasure of nonvolatile memory cells

Abstract

An operating method is provided which includes receiving a read command and a read address, performing a read operation about memory cells selected according to the read address, and performing a reliability verification read operation about unselected memory cells adjacent to the selected memory cells. A number of memory cells each corresponding to at least one state of an erase state and program states of the unselected memory cells is counted as a count value based on the result of the reliability verification read operation. Data read through the read operation is output to an external device and data read through the reliability verification read operation is not output to the external device.

Claims

1. An operating method of a storage device which includes a nonvolatile memory and a memory controller configured to control the nonvolatile memory, the nonvolatile memory comprising a plurality of cell strings arranged on a substrate, each of the cell string including a ground selection transistor, a plurality of memory cells and a string selection transistor sequentially stacked on the substrate, the operating method comprising:

receiving a read command and a read address;

performing a read operation about memory cells of the nonvolatile memory, selected by the read address, according to the read command;

performing a reliability verification read operation about unselected memory cells of the nonvolatile memory which are not the selected memory cells; and

calculating a difference between a count value and a reference count value, including counting a number of memory cells, each corresponding to at least one state of an erase state and program states of the unselected memory cells, to define the count value based on a result of the reliability verification read operation; and

outputting data read with the read operation to an external device and not outputting data read with the reliability verification read operation to the external device.

2. The operating method of claim 1, wherein the number of memory cells corresponding to the erase state, or a program state corresponding to a highest threshold voltage distribution range, from among the program states, is counted to define the count value.

3. The operating method of claim 1, wherein the reliability verification read operation is determined as being failed, when the difference is not less than a threshold value.

4. The operating method of claim 3, wherein the reference count value indicates a number of memory cells, programmed to the at least one state, from among the unselected memory cells upon programming the unselected memory cells.

5. The operating method of claim 3, further comprising performing a read reclaim operation when the reliability verification read operation is determined as being failed.

6. The operating method of claim 3, further comprising performing a second reliability verification read operation about at least one page data of a plurality of page data, stored at unselected second memory cells adjacent to the selected memory cells, when the reliability verification read operation is determined as being failed.

7. The operating method of claim 6, wherein the performing of the second reliability verification read operation includes:

reading the at least one page data; and

performing a read reclaim operation when a bit error ratio of the at least one page data is not less than a second threshold value.

8. The operating method of claim 1, wherein the nonvolatile memory includes:

wherein string selection transistors of cell strings in first through M-th rows are respectively connected to first through M-th string selection lines;

wherein memory cells belonging to cell strings of the first through M-th rows and having first through N-th heights are respectively connected to first through N-th word lines; and

wherein the selected memory cells belong to a selected page corresponding to a word line, of the first through N-th word lines, and a string selection line, of the first through M-th string selection lines, that are selected according to the read address.

9. The operating method of claim 8, wherein the reliability verification read operation is performed with respect to unselected memory cells that belong to one of:

an unselected first page corresponding to an upper word line, adjacent to the selected word line, and the selected string selection line; and

an unselected second page corresponding to a lower word line, adjacent to the selected word line, and the selected string selection line.

10. The operating method of claim 8, wherein the reliability verification read operation is performed with respect to unselected memory cells that belong to one of:

an unselected first page corresponding to an upper word line, adjacent to the selected word line, and an unselected string selection line;

an unselected second page corresponding to a lower word line, adjacent to the selected word line, and to the unselected string selection line; and

an unselected third page corresponding to the selected word line and the unselected string selection line.

11. The operating method of claim 8, wherein the reliability verification read operation is performed with respect to unselected memory cells that belong to one of:

a first page corresponding to the selected word line and a predetermined word line; and

a second page corresponding to an unselected string selection line and the predetermined word line.

12. The operating method of claim 1, wherein the reliability verification read operation is performed when a count, that is increased when the read operation is executed, reaches a number;

and wherein the number is updated when the reliability verification read operation is executed.

13. The operating method of claim 1, further comprising:

collecting a plurality of page data to be programmed at the unselected memory cells;

counting a number of unselected memory cells to be programmed to the at least one state, based on the plurality of page data collected, to define a counted value;

programming the collected plurality of page data at the unselected memory cells; and

programming the counted value as the reference count value at a spare area associated with the unselected memory cells.

14. The operating method of claim 13, wherein calculating of the difference between the count value and the reference count value includes:

counting the number of memory cells, corresponding to the at least one state, from among the result of the reliability verification read operation;

reading the reference count value from the spare area; and

calculating the difference between the count value and the reference count value.

15. A storage device, comprising:

a nonvolatile memory including a plurality of cell strings arranged on a substrate, each of the cell string including a ground selection transistor, a plurality of memory cells and a string selection transistor sequentially stacked on the substrate; and

a memory controller to control the nonvolatile memory;

wherein each cell string includes a ground selection transistor, a plurality of memory cells, and a string selection transistor sequentially stacked on the substrate in a direction perpendicular to the substrate; and

wherein the memory controller is configured to read data from selected memory cells of the nonvolatile memory in response to a request of an external device, perform a reliability verification read operation including counting a number of memory cells corresponding to at least one state of an erase state and program states of unselected memory cells adjacent to the selected memory cells to define a count value, and perform a read reclaim operation about the unselected memory cells based upon a result of the counting.

16. The storage device of claim 15, wherein performing the reliability verification read operation includes calculating a difference between the count value and a reference count value, and the result is determined as being failed, when the difference is not less than a threshold value.

17. The storage device of claim 16, wherein the reference count value indicates a number of memory cells, programmed to the at least one state, from among the unselected memory cells upon programming the unselected memory cells.

18. The storage device of claim 16, wherein the memory controller is configured to:

collect a plurality of page data to be programmed at the unselected memory cells;

count a number of unselected memory cells to be programmed to the at least one state, based on the plurality of page data collected, to define a counted value;

program the collected plurality of page data at the unselected memory cells; and

program the counted value as the reference count value at a spare area associated with the unselected memory cells.

19. The storage device of claim 18, wherein calculating of the difference between the count value and the reference count value includes:

counting the number of memory cells, corresponding to the at least one state, from among the result of the reliability verification read operation;

reading the reference count value from the spare area; and

calculating the difference between the count value and the reference count value.

20. The storage device of claim 15, wherein string selection transistors of cell strings in first through M-th rows are respectively connected to first through M-th string selection lines;

wherein memory cells belonging to cell strings of the first through M-th rows and having first through N-th heights are respectively connected to first through N-th word lines; and

wherein the selected memory cells belong to a selected page corresponding to a word line, of the first through N-th word lines, and a string selection line, of the first through M-th string selection lines, that are selected according to the read address.