Semiconductor Structure Having Integrated Snubber Resistance and Related Method

• US 20160104773A1
• Filed: 09/30/2015
• Published: 04/14/2016
• Est. Priority Date: 10/09/2014
• Status: Active Grant

• Current Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Original Assignee: International Rectifier Corporation (Infineon Technologies AG)
• Inventors: Kelkar, Kapil, Henson, Timothy D., Ma, Ling, Burke, Hugo, Bigglestone, Mary, Amali, Adam, Haase, Robert
• Granted Patent: US 9,627,328 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 23/5226 Via connections in a multilevel interconnection structure
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0865 Disposition
• CPC Class Codes: H01L 29/0869 Shape cell layout H01L29/0696
• CPC Class Codes: H01L 29/405 Resistive arrangements, e.g. resistive or semi-insulating field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor structure is disclosed. The semiconductor structure includes a source trench in a drift region, the source trench having a source trench dielectric liner and a source trench conductive filler surrounded by the source trench dielectric liner, a source region in a body region over the drift region. The semiconductor structure also includes a patterned source trench dielectric cap forming an insulated portion and an exposed portion of the source trench conductive filler, and a source contact layer coupling the source region to the exposed portion of the source trench conductive filler, the insulated portion of the source trench conductive filler increasing resistance between the source contact layer and the source trench conductive filler under the patterned source trench dielectric cap. The source trench is a serpentine source trench having a plurality of parallel portions connected by a plurality of curved portions.

Claims

1. A semiconductor structure comprising:

a source trench in a drift region, said source trench having a source trench dielectric liner and a source trench conductive filler surrounded by said source trench dielectric liner;

a source region in a body region over said drift region;

a patterned source trench dielectric cap forming an insulated portion and an exposed portion of said source trench conductive filler;

a source contact layer coupling said source region to said exposed portion of said source trench conductive filler, said insulated portion of said source trench conductive filler increasing resistance between said source contact layer and said source trench conductive filler under said patterned source trench dielectric cap.

2. The semiconductor structure of claim 1 wherein said insulated portion of said source trench conductive filler is configured to increase damping of output signals generated by said semiconductor structure during electrical operation.

3. The semiconductor structure of claim 1 wherein said insulated portion of said source trench conductive filler and a capacitance under said insulated portion of said source trench conductive filler are configured to increase damping of output signals generated by said semiconductor structure during electrical operation.

4. The semiconductor structure of claim 1 wherein said source trench includes at least two parallel portions and a curved portion connecting said at least two parallel portions.

5. The semiconductor structure of claim 1 wherein said source trench conductive filler includes polysilicon.

6. The semiconductor structure of claim 1 further comprising a gate trench adjacent to said source region and extending through said body region into said drift region.

7. The semiconductor structure of claim 6 further comprising a gate trench dielectric cap over said gate trench.

8. The semiconductor structure of claim 1 wherein said source trench is a serpentine source trench having a plurality of parallel portions connected by a plurality of curved portions.

9. The semiconductor structure of claim 8 wherein said plurality of parallel portions have substantially uniform spacing.

10. The semiconductor structure of claim 8 further comprising a termination trench enclosing said serpentine source trench.

11. A method of forming a semiconductor structure, the method comprising:

forming a source trench in a drift region;

forming a source trench dielectric liner and a source trench conductive filler surrounded by said source trench dielectric liner;

forming a source region in a body region over said drift region;

forming a patterned source trench dielectric cap, said patterned source trench dielectric cap forming an insulated portion and an exposed portion of said source trench conductive filler;

forming a source contact layer coupling said source region to said exposed portion of said source trench conductive filler, said insulated portion of said source trench conductive filler increasing resistance between said source contact layer and said source trench conductive filler under said patterned source trench dielectric cap.

12. The method of claim 11 wherein said insulated portion of said source trench conductive filler is configured to increase damping of output signals generated by said semiconductor structure during electrical operation.

13. The method of claim 11 wherein said insulated portion of said source trench conductive filler and a capacitance under said insulated portion of said source trench conductive filler are configured to increase damping of output signals generated by said semiconductor structure during electrical operation.

14. The method of claim 11 wherein said source trench includes at least two parallel portions and a curved portion connecting said at least two parallel portions.

15. The method of claim 11 wherein said source trench conductive filler includes polysilicon.

16. The method of claim 11 further comprising forming a gate trench adjacent to said source region and extending through said body region into said drift region.

17. The method of claim 16 further comprising forming a gate trench dielectric cap over said gate trench.

18. The method of claim 11 wherein said source trench is a serpentine source trench having a plurality of parallel portions connected by a plurality of curved portions.

19. The method of claim 18 wherein said plurality of parallel portions have substantially uniform spacing.

20. The method of claim 18 wherein said serpentine source trench is enclosed by a termination trench.