DISTRIBUTING STORAGE OF ECC CODE WORDS

• US 20160110252A1
• Filed: 01/21/2015
• Published: 04/21/2016
• Est. Priority Date: 10/20/2014
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Hyun, Jea, Peterson, James, Strasser, John
• Granted Patent: US 9,984,768 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/1044 with specific ECC/EDC distribution
• CPC Class Codes: G11C 2029/0411 Online error correction
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents

Abstract

Apparatuses, systems, methods, and computer program products are disclosed for distributing error-correction codes. A correction module is configured to determine an error correction code (ECC) code word for storage on one or more non-volatile storage media. A mapping module is configured to determine one or more addresses for the ECC code word so that a portion of the ECC code word is stored at a first physical address within a first set of strings of storage cells of the one or more non-volatile storage media and a portion of the ECC code word is stored at a different physical address within a second set of strings of storage cells of the one or more non-volatile storage media. A storage module is configured to cause the ECC code word to be stored in the one or more non-volatile storage media based on the determined one or more addresses.

Claims

1. A method comprising:

determining an error-correction code (ECC) code word of data;

storing a first portion of the ECC code word in a first set of cells of a first memory element of a non-volatile recording device; and

storing a second portion of the ECC code word in a second set of cells of a second memory element of the non-volatile recording device, the second set of cells having a different error rate than the first set of cells.

2. The method of claim 1, wherein the first set of cells is located at a first position in one or more vertical memory structures and the second set of cells is located at a different position in one or more different vertical memory structures.

3. The method of claim 2, wherein the vertical memory structures comprise three dimensional, vertical, NAND memory structures.

4. The method of claim 2, wherein the first set of cells is located on a source side of the one or more vertical memory structures and the second set of cells is located on a drain side of the one or more different vertical memory structures.

5. The method of claim 4, wherein redundant data for the ECC code word is stored in the first set of cells on the source side of the one or more vertical memory structures.

6. The method of claim 2, wherein the first set of cells has a shorter path to a select gate source for the first set of cells than the second set of cells has to a select gate source for the second set of cells.

7. The method of claim 1, further comprising mapping an address for the second portion of the ECC code word to the second set of cells, the second set of cells having a different location relative to the second memory element than a location of the first set of cells relative to the first memory element.

8. The method of claim 1, wherein the first set of cells and the second set of cells are located on different die of the non-volatile recording device.

9. The method of claim 1, further comprising recovering storage capacity for an erase block comprising one of the first set of cells and the second set of cells in response to recovering storage capacity for an erase block comprising the other of the first set of cells and the second set of cells.

10. The method of claim 1, further comprising dividing the ECC code word into a number of portions including the first portion and the second portion, the number of portions corresponding to a number of die in a storage channel of the non-volatile recording device.

11. The method of claim 1, wherein a larger portion of the ECC code word is stored in the first set of cells, the first set of cells having a lower error rate than the second set of cells.

12. An apparatus comprising:

a correction module configured to determine an error correction code (ECC) code word for storage on one or more non-volatile storage media;

a mapping module configured to determine one or more addresses for the ECC code word so that a portion of the ECC code word is stored at a first physical address within a first set of strings of storage cells of the one or more non-volatile storage media and a portion of the ECC code word is stored at a different physical address within a second set of strings of storage cells of the one or more non-volatile storage media; and

a storage module configured to cause the ECC code word to be stored in the one or more non-volatile storage media based on the determined one or more addresses.

13. The apparatus of claim 12, wherein the first set of strings of storage cells are located on a first set of one or more die of the one or more non-volatile storage media and the second set of strings of are located on a second set of one or more die of the one or more non-volatile storage media.

14. The apparatus of claim 12, wherein one or more of the correction module, the mapping module, and the storage module comprise computer executable code of a device driver for the one or more non-volatile storage media, the computer executable code stored on a computer readable storage medium.

15. The apparatus of claim 14, wherein computer executable code of the correction module is executable to perform operations to determine the ECC code word of data by encoding data into the ECC code word and computer executable code of the mapping module is executable to determine the one or more addresses for the ECC code word by adjusting one or more addresses for the ECC code word so that a portion of the ECC code word is stored in the first set of strings of storage cells and a portion of the ECC code word is stored in the second set of strings of storage cells.

16. The apparatus of claim 12, wherein one or more of the correction module, the mapping module, and the storage module comprise logic hardware of a controller for the one or more non-volatile storage media.

17. The apparatus of claim 16, wherein the correction module is configured to determine the ECC code word of data by receiving the ECC code word at the controller from a host device and the mapping module is configured to determine the one or more addresses for the ECC code word by receiving the one or more addresses at the controller from the host device.

18. A system comprising:

a plurality of die, each die comprising a plurality of vertical NAND flash memory structures comprising word lines; and

a controller for the plurality of die, the controller configured to store part of an error-correction code (ECC) code word in cells having a first position in a word line of a first die of the plurality of die and part of the ECC code word in cells having a second position in a word line of a second die of the plurality of die.

19. The system of claim 18, wherein the controller comprises a hardware controller in communication with the plurality of non-volatile memory elements over one or more electrical communication lines to store the ECC code word.

20. The system of claim 18, wherein the controller comprises a device driver for the plurality of non-volatile memory elements, the device driver comprising computer executable program code stored on a computer readable storage medium, the computer executable program code executable to store the ECC code word.