Methods and Circuits for Improved Reliability of Power Devices Operating under Repetitive Thermal Stress

• US 20160118976A1
• Filed: 10/28/2014
• Published: 04/28/2016
• Est. Priority Date: 10/28/2014
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Boianceanu, Cristian Mihai, Simon, Dan-Ionut
• Granted Patent: US 10,411,693 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H03K 17/145 in field-effect transistor switches
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors

Abstract

Thermo-migration induced stress in power devices can be mitigated by deactivating a subset of power device components (e.g., transistors, etc.) when the power device experiences a high stress condition. Deactivating the subset of power device components serves to bifurcate the active area of the power switching device into smaller active regions, which advantageously changes the temperature gradients in the active area/regions. In some embodiments, a control circuit dynamically deactivates different subsets of power device components to shift the thermo-migration induced stress points to different portions of the active region over the lifetime of the power switching device.

Claims

1. A method comprising:

sensing when a power switching device is experiencing a high stress condition, wherein the power switching device comprises an input port, an output port, and power device components coupled between the input port and the output port, and wherein electrical current flows between the input port and the output port when the power switching device experiences the high stress condition; and

activating a first subset of the power device components without activating a second subset of the power device components in response to the power switching device experiencing the high stress condition, wherein the electrical current flows through the first subset of power device components without flowing through the second subset of power device components when the power switching device experiences the high stress condition.

2. The method of claim 1, wherein activating the first subset of the power device components without activating the second subset of the power device components in response to the power switching device experiencing the high stress condition changes the temperature gradient across an active area of the power switching device.

3. The method of claim 1, wherein the power device components comprise transistors, the first subset of power device components corresponding to a first subset of the transistors, and the second subset of power device components corresponding to a second subset of the transistors, and

wherein the power switching device further comprises a first subset of connections adapted to carry activation signals to gates of the first set of transistors, and a second subset of connection adapted to carry activation signals to gates of the second set of transistors.

4. The method of claim 3, wherein the second subset of connections are opened, while the first subset of connection are closed, and wherein the second subset of connection being opened prevents the activation signals from reaching the gates of the second subset of transistors when the power switching device experiences the high stress condition.

5. The method of claim 4, wherein the power switching device further comprises a third subset of connections adapted to carry triggering signals from a gate driver to the gates of the transistors when the power switching device is actuated by the gate driver, and wherein the third subset of connections is independent from the second subset of connections such that the triggering signals are provided to the gates of the second subset of transistors during actuation of the power switching device irrespective of the second subset of connections being opened.

6. The method of claim 5, wherein the second subset of connections are permanently opened during a manufacturing process of the power switching device.

7. A method comprising:

sensing when a power switching device experiences a high stress condition, wherein the power switching device comprises an input port, an output port, and power device components coupled between the input port and the output port, and wherein electrical current flows between the input port and the output port when the power switching device experience the high stress condition; and

dynamically deactivating different subsets of the power device components during different periods, wherein at least some of the power device components remain activated during each of the periods, and

wherein the electrical current flows through activated power device components without flowing through the subset of power device components that are deactivated during a given period when the power switching device experiences the high stress condition.

8. The method of claim 7, wherein dynamically deactivating different subsets of the power device components during different periods comprises:

selectively deactivating different subsets of the power device components in accordance with a random selection criteria.

9. The method of claim 7, wherein dynamically deactivating different subsets of the power device components during different high stress periods comprises:

selectively deactivating different subsets of the power device components in accordance with a predefined pattern.

10. The method of claim 7, wherein dynamically deactivating different subsets of the power device components during different high stress periods comprises:

selectively deactivating different subsets of the power device components in accordance with readings from stress sensors.

11. The method of claim 10, wherein the stress sensors are temperature sensors.

12. The method of claim 10, wherein the stress sensors are mechanical stress sensors.

13. The method of claim 10, wherein the power device components comprise transistors, the first subset of power device components corresponding to a first subset of the transistors, and the second subset of power device components corresponding to a second subset of the transistors,

wherein the power switching device further comprises a first subset of connections adapted to carry activation signals to gates of the first subset of transistors, and a second subset of connections adapted to carry activation signals to gates of the second subset of transistors, and

wherein dynamically deactivating different subsets of the power device components during different periods comprises:

opening the first subset of connections during a first period, wherein opening the first subset of connections prevents the activation signals from activating the first subset of transistors when the power switching device experiences the high stress condition during the first period; and

opening the second subset of connections during a second period, wherein opening the second subset of connections prevents the activation signals from activating the second subset of transistors when the power switching device experiences the high stress condition during the second period.

14. The method of claim 13, further comprising:

sending a triggering signal over a third subset of connections during the first period, the third subset of connections extending from a gate driver to gates of the transistors, wherein the third subset of connections are independent from the first subset of connections such that the triggering signals activate the first subset of transistors when the power switching device is actuated during the first period irrespective of the second subset of connections being opened.

15. A power switching device comprising:

an input port adapted to be coupled to a load;

an output port adapted to be coupled to a sink, wherein electrical current flows between the input port and the output port when the power switching device experiences a high stress condition; and

a plurality of power device components coupled between the input port and the output port, wherein a first subset of the power device components are de-activated when the power switching device experiences a high stress condition during a first period, and wherein a second subset of the power device components remain activated when the power switching device experiences the high stress condition during the first period, and

wherein the electrical current flows through the second subset of power device components without flowing through the first subset of power device components when the power switching device experiences the high stress condition during the first period.

16. The power switching device of claim 15, wherein the power device components comprise transistors having drain-source paths coupled between the input port and the output port, the first subset of power device components corresponding to a first subset of the transistors, and the second subset of power device components corresponding to a second subset of the transistors.

17. The power switching device of claim 16, further comprising:

a first subset of connections configured to carry activation signals to gates of the first subset of transistors when the power switching device experiences the high stress condition;

a second subset of connections configured to carry the activation signals to gates of the second subset of transistors when the power switching device experiences the high stress condition; and

a controller configured to open the first subset of connections during the first period without opening the second subset of connections during the first period.

18. The power switching device of claim 17, further comprising:

a gate driver adapted to provide triggering signals when the power switching device is actuated; and

a third subset of connections configured to carry the triggering signals to gates of the transistors when the power switching device is actuated,

wherein the third subset of connections are independent from the first subset of connections such that the triggering signals activate the first subset of transistors when the power switching device is actuated during the first period irrespective of the first subset of connections being open.

19. The power switching device of claim 16, wherein the power switching device further comprises:

connections adapted to carry activation signals to gates of the transistors when the power switching device experiences the high stress condition; and

a control circuit configured to dynamically open different subsets of the connections during the different periods to prevent the activation signals from activating a corresponding subset of the transistors when the power switching device experiences the high stress condition during the corresponding period.

20. The power switching device of claim 19, wherein the control circuit is adapted to selectively deactivate different subsets of the transistors during different periods in accordance with a random selection criteria.

21. The power switching device of claim 19, wherein the control circuit is adapted to selectively deactivate different subsets of the transistors during different periods in accordance with a predefined pattern.

22. The power switching device of claim 19, wherein the control circuit is adapted to selectively deactivate different subsets of the transistors during different periods in accordance with readings from stress sensors.

23. The power switching device of claim 22, wherein the stress sensors are temperature sensors.

24. The power switching device of claim 22, wherein the stress sensors are mechanical stress sensors.

25. The power switching device of claim 16, wherein the input port is adapted to be coupled to an inductive load, and wherein the power switching device further comprises:

a chain of diodes, including at least a Zener diode, coupled between the input port and gates of the transistors, the chain of diodes adapted to enter an avalanche mode when the voltage across the switching component exceeds a threshold; and

connections extending between the chain of diodes and the gates of the transistors, the connections configured to carry activation signals to the gates of the transistors when the chain of diodes enter the avalanche mode,

wherein a first subset of the connections extend between the chain of diodes and gates of the second subset of transistors, the first subset of connections being open during the first period, and

wherein a second subset of the connections extend between the chain of diodes and gates of the second subset of transistors, the second subset of connections being closed during the first period.

26. The power switching device of claim 25, wherein the second subset of connections are permanently open.

27. The power switching device of claim 25, wherein at least some connections in the first subset of connections are closed during a second period.

28. The power switching device of claim 16, wherein the input port is adapted to be coupled to a capacitive load, and wherein the power switching device further comprises:

a gate driver configured to actuate the power switching device by providing a triggering signal to gates of the transistors;

a first subset of connections extending between the gate driver and gates of the first subset of transistors, the first subset of connections being open during the first period; and

a second subset of connections extending between the gate driver and gates of the second subset of transistors, the second subset of connections being closed during the first period.

29. The power switching device of claim 28, wherein the second subset of connections are permanently open.

30. The power switching device of claim 28, wherein at least some connections in the first subset of connections are closed during a second period.