PIXEL STRUCTURE AND DRIVING METHOD THEREOF

• US 20160125808A1
• Filed: 01/29/2015
• Published: 05/05/2016
• Est. Priority Date: 10/31/2014
• Status: Abandoned Application

• Current Assignee: AU Optronics Corporation
• Original Assignee: AU Optronics Corporation
• Inventors: HSU, Wei-Chu, WU, Pi-Cheng, JEN, Ko-Ruey, LEE, Chien-Ya
• Application Number:
  US14/608,415
• Publication Number:
  US 20160125808A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2310/0202 Addressing of scan or signal lines
• CPC Class Codes: G09G 2320/045 Compensation of drifts in the characteristics of light emitting or modulating elements
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element

Abstract

A pixel structure includes a light-emitting diode, a transistor, a data-receiving unit, a compensating unit, and a resetting unit. The transistor is configured to be electrically coupled to the light-emitting diode, and drive the light-emitting diode based on a voltage difference between the control terminal and the first terminal of the transistor. The data-receiving unit is configured to be electrically coupled to the first terminal of the transistor, and provide a pixel date signal to the first terminal of the transistor based on a first scan signal. The compensating unit is electrically coupled to the control terminal and the second terminal of the transistor to act as a current path therebetween. The resetting unit is electrically coupled to the light-emitting diode. The resetting unit is configured to respectively provide a reverse bias and reference voltage to the light-emitting diode and the control terminal of the transistor.

Claims

1. A pixel structure, comprising:

a light-emitting diode;

a first transistor comprising;

a first terminal configured to receive a pixel data signal;

a second terminal; and

a control terminal configured to receive a first scan signal so as to transmit the pixel data signal from the first terminal to the second terminal according to the first scan signal;

a second transistor comprising a first terminal, a second terminal and a control terminal, and configured to drive the light-emitting diode according to a voltage difference between the control terminal and the first terminal of the second transistor, wherein the first terminal of the second transistor is electrically coupled to the second terminal of the first transistor;

a third transistor comprising;

a first terminal configured to receive a first power voltage;

a second terminal electrically coupled to the first terminal of the second transistor; and

a control terminal configured to receive a second scan signal so as to provide the first power voltage to the second transistor according to the second scan signal;

a fourth transistor comprising;

a first terminal electrically coupled to the second terminal of the second transistor;

a second terminal electrically coupled to the light-emitting diode; and

a control terminal configured to receive the second scan signal so as to provide a driving current to the light-emitting diode according to the second scan signal;

a fifth transistor comprising;

a first terminal electrically coupled to the second terminal of the second transistor;

a second terminal electrically coupled to the control terminal of the second transistor; and

a control terminal configured to receive the first scan signal so as to turn on a path between the first terminal of the fifth transistor and the second terminal of the fifth transistor according to the first scan signal;

a sixth transistor configured to cause the light-emitting diode to be in a state of reverse bias, and provide a reference voltage to the control terminal of the second transistor; and

a capacitor comprising;

a first terminal electrically coupled to the first terminal of the third transistor or the sixth transistor; and

a second terminal electrically coupled to the control terminal of the second transistor.

2. The pixel structure of claim 1, wherein the sixth transistor comprises:

a first terminal configured to receive the reference voltage;

a second terminal electrically coupled to the second terminal of the fourth transistor; and

a control terminal configured to receive a reset scan signal or the first scan signal so as to transmit the reference voltage from the first terminal of the sixth transistor to the second terminal of the sixth transistor according to the reset scan signal or the first scan signal.

3. The pixel structure of claim 1, wherein the sixth transistor comprises:

a first terminal configured to receive the reset scan signal;

a second terminal electrically coupled to the second terminal of the fourth transistor; and

a control terminal electrically coupled to the first terminal of the sixth transistor, wherein the reset scan signal or the first scan signal is transmitted from the first terminal of the sixth transistor to the second terminal of the sixth transistor.

4. The pixel structure of claim 1, wherein the sixth transistor comprises:

a first terminal configured to receive the reference voltage;

a second terminal electrically coupled to the second terminal of the second transistor; and

a control terminal configured to receive a reset scan signal so as to transmit the reference voltage from the first terminal of the sixth transistor to the second terminal of the sixth transistor according to the reset scan signal.

5. The pixel structure of claim 1, wherein the sixth transistor comprises:

a first terminal configured to receive a reset scan signal;

a second terminal electrically coupled to the second terminal of the second transistor; and

a control terminal electrically coupled to the first terminal of the sixth transistor, wherein the reset scan signal is transmitted from the first terminal of the sixth transistor to the second terminal of the sixth transistor.

6. A pixel structure comprising:

a light-emitting diode;

a transistor electrically coupled to the light-emitting diode, wherein the transistor comprises a control terminal, a first terminal and a second terminal, and is configured to drive the light-emitting diode according to a voltage difference between the control terminal and the first terminal of the transistor;

a data-receiving unit electrically coupled to the first terminal of the transistor, and configured to provide a pixel data signal to the first terminal of the transistor according to a first scan signal;

a compensating unit electrically coupled to the control terminal and the second terminal of the transistor, and configured to be a current path between the control terminal and the second terminal of the transistor; and

a resetting unit electrically coupled to the light-emitting diode or the second terminal of the transistor, wherein the resetting unit is configured to cause the light-emitting diode to be in a state of reverse bias, and provide a reference voltage to the control terminal of the transistor.

7. The pixel structure of claim 6, further comprising a first switch unit, wherein the first switch unit comprises:

a first terminal configured to receive a first power voltage;

a second terminal electrically coupled to the first terminal of the transistor; and

a control terminal configured to receive a second scan signal so as to provide the first power voltage to the transistor according to the second scan signal.

8. The pixel structure of claim 6, further comprising a second switch unit, wherein the second switch unit is electrically coupled between the second terminal of the transistor and the light-emitting diode, and configured to connect the second terminal of the transistor and the light-emitting diode according to the second scan signal.

9. The pixel structure of claim 6, further comprising a capacitor, wherein the capacitor is electrically coupled between the first terminal of the first switch unit and the control terminal of the transistor.

10. The pixel structure of claim 6, further comprising a capacitor, wherein the capacitor comprises:

a first terminal electrically coupled to the control terminal of the transistor; and

a second terminal electrically coupled to the resetting unit.

11. The pixel structure of claim 6, wherein the resetting unit comprises:

a first terminal configured to receive a reference voltage;

a second terminal electrically coupled to the light-emitting diode; and

a control terminal configured to receive a reset scan signal or the first scan signal so as to transmit the reference voltage from the first terminal of the resetting unit to the second terminal of the resetting unit according to the reset scan signal or the first scan signal.

12. The pixel structure of claim 6, wherein the resetting unit comprises:

a first terminal configured to receive a reset scan signal;

a second terminal electrically coupled to the light-emitting diode; and

a control terminal electrically coupled to the first terminal of the resetting unit, wherein the reset scan signal or the first scan signal is transmitted from the first terminal of the resetting unit to the second terminal of the resetting unit.

13. The pixel structure of claim 6, wherein the resetting unit comprises:

a first terminal configured to receive a reference voltage;

a second terminal electrically coupled to the second terminal of the transistor; and

a control terminal configured to receive a reset scan signal so as to transmit the reference voltage from the first terminal of the resetting unit to the second terminal of the resetting unit according to the reset scan signal.

14. The pixel structure of claim 6, wherein the resetting unit comprises:

a first terminal configured to receive a reset scan signal;

a second terminal electrically coupled to the second terminal of the transistor; and

a control terminal electrically coupled to the first terminal of the resetting unit, wherein the reset scan signal is transmitted from the first terminal of the resetting unit to the resetting unit the second terminal.

15. A driving method, configured to drive a pixel structure, wherein the pixel structure comprises a light-emitting diode, a data-receiving unit, a transistor, a compensating unit and a resetting unit, and the transistor comprises a first terminal, a second terminal and a control terminal, wherein the data-receiving unit is electrically coupled to the first terminal of the transistor, the compensating unit is electrically coupled to the control terminal and the second terminal of the transistor, and the resetting unit is electrically coupled to the light-emitting diode or the second terminal of the transistor, wherein the driving method comprises:

controlling the resetting unit to receive and transmit a reference voltage to the light-emitting diode for causing the light-emitting diode to be in a state of reverse bias;

controlling the compensating unit to provide a current path between the control terminal and the second terminal of the transistor for transmitting the reference voltage to the control terminal of the transistor;

controlling the data-receiving unit to receive and transmit a pixel data signal to a first terminal of the transistor; and

driving the light-emitting diode according to a voltage difference between the control terminal and the first terminal of the transistor.