SOLID-STATE IMAGING DEVICE

• US 20160127668A1
• Filed: 05/29/2014
• Published: 05/05/2016
• Est. Priority Date: 06/11/2013
• Status: Active Grant

• Current Assignee: Hamamatsu Photonics KK
• Original Assignee: Hamamatsu Photonics KK
• Inventors: FUJITA, Kazuki, KYUSHIMA, Ryuji, MORI, Harumichi
• Granted Patent: US 9,571,766 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14632 Wafer-level processed structures
• CPC Class Codes: H01L 27/14658 X-ray, gamma-ray or corpuscular radiation imagers measuring X-, gamma- or corpuscular radiation G01T1/00
• CPC Class Codes: H01L 27/14661 of the hybrid type
• CPC Class Codes: H01L 27/14663 Indirect radiation imagers, e.g. using luminescent members
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H04N 25/68 applied to defects
• CPC Class Codes: H04N 25/70 SSIS architectures; Circuits associated therewith
• CPC Class Codes: H04N 25/709 Circuitry for control of the power supply
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: H04N 5/32 Transforming X-rays cameras or camera modules for generating image signals from X-rays H04N23/30; circuitry of SSIS for transforming X-rays into image signals H04N25/30

Abstract

A solid-state imaging device includes a sensor panel section and a readout circuit section. The sensor panel section is disposed on a glass substrate and has a photodetecting section including pixels arrayed in M rows and N columns, row selection lines, and readout lines. The readout circuit section is disposed on a substrate and has N integration circuits. Rectifier circuits are connected between nodes, between N panel-side connection points and the integration circuits, and a constant potential line. Circuit elements having resistance components are connected between the nodes and readout lines.

Claims

1. A solid-state imaging device comprising:

a sensor panel section formed on a first substrate, and having a photodetecting section constructed by two-dimensionally arraying pixels, each including a photodiode and a thin-film transistor having one current terminal connected to the photodiode, over a plurality of rows and a plurality of columns, a plurality of row selection lines provided for the respective rows and connected to control terminals of the thin-film transistors included in the pixels of the corresponding rows, and a plurality of readout lines provided for the respective columns and connected to the other current terminals of the thin-film transistors included in the pixels of the corresponding columns;

a readout circuit section disposed on a second substrate different from the first substrate, and having a plurality of integration circuits for respectively outputting voltage values corresponding to amounts of charges input through the plurality of readout lines;

a plurality of panel-side connection points disposed on the first substrate, and for respectively interconnecting the plurality of readout lines on the first substrate and the plurality of integration circuits on the second substrate;

a plurality of rectifier circuits respectively connected between a plurality of nodes between the plurality of panel-side connection points and the plurality of integration circuits and a constant potential line; and

a plurality of circuit elements respectively connected between the plurality of nodes and the plurality of readout lines, and having resistance components.

2. The solid-state imaging device according to claim 1, wherein the plurality of rectifier circuits and the constant potential line are disposed on the second substrate.

3. The solid-state imaging device according to claim 1, wherein the thin-film transistor includes a region constituted by at least one of amorphous silicon and polycrystalline silicon.

4. The solid-state imaging device according to claim 1, wherein the plurality of circuit elements are disposed on the second substrate.

5. The solid-state imaging device according to claim 1, wherein the plurality of circuit elements are transistors.

6. The solid-state imaging device according to claim 1, wherein the plurality of circuit elements include regions constituted by at least one of amorphous silicon and polycrystalline silicon.

7. The solid-state imaging device according to claim 1, wherein the control terminal of the thin-film transistor has a negative off-voltage.

8. The solid-state imaging device according to claim 1, wherein a plurality of switch circuits are respectively connected between the plurality of nodes and the plurality of integration circuits.