THIN FILM TRANSISTOR DEVICE, METHOD FOR MANUFACTURING SAME AND DISPLAY DEVICE
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Abstract
A thin film transistor device including: a substrate; a gate electrode; an electrode pair composed of a source electrode and a drain electrode; a channel layer; and a passivation layer. The channel layer is made of an oxide semiconductor. The passivation layer includes a first layer, a second layer, and a third layer layered one on top of another in this order with the first layer closest to the substrate. The first layer is made of one of silicon oxide, silicon nitride, and silicon oxynitride, the second layer is made of an Al compound, and the third layer is made of one of silicon oxide, silicon nitride, and silicon oxynitride.
24 Citations
56 Claims
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1-28. -28. (canceled)
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29. A thin film transistor device comprising:
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a substrate; a gate electrode above the substrate; a channel layer above the gate electrode; an electrode pair on the channel layer, the electrode pair composed of a source electrode and a drain electrode that are spaced away from one another; and a passivation layer extending over the gate electrode, the channel layer, and the electrode pair, the passivation layer having a hole penetrating therethrough in a thickness direction, wherein the channel layer is made of an oxide semiconductor, and the passivation layer includes a first layer, a second layer, and a third layer layered one on top of another in this order with the first layer closest to the substrate, the first layer made of one of silicon oxide, silicon nitride, and silicon oxynitride, the second layer made of an Al compound, the third layer made of one of silicon oxide, silicon nitride, and silicon oxynitride. - View Dependent Claims (30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42)
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43. A method for manufacturing a thin film transistor device, the method comprising:
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forming a gate electrode above a substrate; forming a channel layer above the gate electrode; forming an electrode pair on the channel layer, the electrode pair composed of a source electrode and a drain electrode that are spaced away from one another; and forming a passivation layer extending over the gate electrode, the channel layer, and the electrode pair, the passivation layer having a hole penetrating therethrough in a thickness direction and including a first layer, a second layer, and a third layer each having a part of the hole in the passivation layer formed therein, wherein the channel layer is made of an oxide semiconductor, and the forming of the passivation layer includes; forming a first layer preform made of one of silicon oxide, silicon nitride, and silicon oxynitride, the first layer preform extending over the gate electrode, the channel layer, and the electrode pair; forming a second layer preform made of an Al compound on the first layer preform; forming a third layer preform made of one of silicon oxide, silicon nitride, and silicon oxynitride above the second layer preform; forming the third layer by performing dry etching to form a hole penetrating through the third layer preform in a thickness direction at a part of the third layer preform corresponding to the hole in the passivation layer; forming the second layer by performing wet etching with respect to a surface of the second layer preform exposed at a bottom of the part of the hole in the third layer to form a hole penetrating through the second layer preform in a thickness direction; and forming the first layer by performing dry etching with respect to a surface of the first layer preform exposed at a bottom of the part of the hole in the second layer to form a hole penetrating through the first layer preform in a thickness direction. - View Dependent Claims (44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56)
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Specification