INTERLACED MAGNETIC RECORDING SUPER PARITY

• US 20160148625A1
• Filed: 10/09/2015
• Published: 05/26/2016
• Est. Priority Date: 11/24/2014
• Status: Active Grant

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Inventors: Zhu, Wenzhong, Gao, Kaizhong, Rausch, Tim, Gage, Edward Charles
• Granted Patent: US 9,633,675 B2
• Time in Patent Office: Days
• CPC Class Codes: G11B 11/10506 by modulating only the light beam of the transducer
• CPC Class Codes: G11B 11/10515 Reproducing compensating pit shift G11B11/1053
• CPC Class Codes: G11B 11/10521 using a single light spot
• CPC Class Codes: G11B 11/10595 Control of operating function
• CPC Class Codes: G11B 20/12 Formatting, e.g. arrangement of data block or words on the record carriers within interface between computers and data recorders G06F3/06
• CPC Class Codes: G11B 20/1217 on discs
• CPC Class Codes: G11B 20/1833 by adding special lists or symbols to the coded information G11B20/1806, G11B20/1866 take precedence
• CPC Class Codes: G11B 20/1889 with discs
• CPC Class Codes: G11B 2005/0021 Thermally assisted recording using an auxiliary energy source for heating the recording layer locally to assist the magnetization reversal
• CPC Class Codes: G11B 2020/1222 ECC block, i.e. a block of error correction encoded symbols which includes all parity data needed for decoding pure error correction aspects G11B20/18
• CPC Class Codes: G11B 2020/1232 sector, i.e. the minimal addressable physical data unit
• CPC Class Codes: G11B 2020/1238 track, i.e. the entire a spirally or concentrically arranged path on which the recording marks are located
• CPC Class Codes: G11B 2020/1292 Enhancement of the total storage capacity
• CPC Class Codes: G11B 27/3027 used signal is digitally coded
• CPC Class Codes: G11B 5/012 Recording on, or reproducing or erasing from, magnetic disks G11B17/00, G11B19/00 take precedence
• CPC Class Codes: G11B 5/09 Digital recording
• CPC Class Codes: G11B 5/59633 Servo formatting G11B5/59627, G11B5/59677, G11B5/59683, G11B5/59688 take precedence
• CPC Class Codes: G11B 5/59638 Servo formatting apparatuses, e.g. servo-writers
• CPC Class Codes: G11B 5/6088 Optical waveguide in or on flying head

Abstract

A storage device includes a storage medium having a first set of non-adjacent data tracks having a number of super parity sectors and a second set of non-adjacent data tracks interlaced with the first set of non-adjacent data tracks. The number of super parity sectors on a data track of the first set of non-adjacent data tracks is selected based on a distance between the data track and an inner diameter of the storage medium.

Claims

1. A storage device comprising:

a storage media including a plurality of data tracks, the plurality of data tracks including a subset of bottom tracks and a subset of top tracks, wherein at least one bottom track of the subset of bottom tracks includes one or more super parity sectors providing error correction for the at least one bottom track of the subset of bottom tracks, and wherein at least one top track of the subset of top tracks does not include one or more super parity sectors.

2. The storage device of claim 1, wherein the subset of top tracks is interlaced with the subset of bottom tracks.

3. The storage device of claim 1, wherein the subset of bottom tracks is written before the subset of top tracks.

4. The storage device of claim 1, further comprising a storage controller configured to control reading from and writing to the subset of top tracks and the subset bottom tracks in a manner that avoids data corruption.

5. The storage device of claim 1, wherein a number of super parity sectors of the one or more super parity sectors is selected based on a distance of the at least one bottom track of the subset of bottom tracks from an inner diameter of the storage media.

6. The storage device of claim 1, wherein a write of a first data track of the subset of top tracks does not affect data of an adjacent second data track of the subset of top tracks.

7. A method comprising:

writing a set of bottom tracks, wherein the set of bottom tracks includes at least one parity sector; and

writing a set of top tracks, wherein each top track of the set of top tracks is interlaced with two bottom tracks of the set of bottom tracks, and wherein at least one top track of the set of top tracks does not include a super parity sector.

8. The method of claim 7, wherein the set of bottom tracks and the set of top tracks include servo sectors.

9. The method of claim 8, wherein writing a top track of the set of top tracks does not affect data of an adjacent track of the set of top tracks.

10. The method of claim 8, wherein the set of bottom tracks are written before the set of top tracks.

11. The method of claim 8, further comprising:

reading at least one top track of the set of top tracks into a temporary cache;

over-writing an adjacent bottom track of the set of bottom tracks; and

re-writing the at least one top track after the over-writing of the adjacent bottom track is complete.

12. The method of claim 7, wherein a number of parity sectors on the set of bottom tracks is selected based on a distance between a bottom track of the set of bottom tracks and a diameter of the storage medium.

13. The method of claim 7, wherein the parity sectors provide error correction for the set of bottom tracks.

14. One or more processor-readable storage media encoding computer-executable instructions for executing on a computer system a computer process, the computer process comprising:

writing a set of bottom tracks, wherein the set of bottom tracks includes at least one parity sector; and

writing a set of top tracks, wherein each top track of the set of top tracks is interlaced with two bottom tracks of the set of bottom tracks, and wherein at least one top track of the set of top tracks does not include a super parity sector.

15. The one or more processor-readable storage medium of claim 14, wherein the set of bottom tracks and the set of top tracks include servo sectors.

16. The one or more processor-readable storage medium of claim 15, wherein writing a top track of the set of top tracks does not affect data of an adjacent track of the set of top tracks.

17. The one or more processor-readable storage medium of claim 15, wherein the set of bottom tracks are written before the set of top tracks.

18. The one or more processor-readable storage medium of claim 15, further comprising:

reading at least one top track of the set of top tracks into a temporary cache;

over-writing an adjacent bottom track of the set of bottom tracks; and

re-writing the at least one top track after the over-writing of the adjacent bottom track is complete.

19. The one or more processor-readable storage medium of claim 14, wherein a number of parity sectors on the set of bottom tracks is selected based on a distance between a bottom track of the set of bottom tracks and a diameter of the storage medium.

20. The one or more processor-readable storage medium of claim 14, wherein the parity sectors provide error correction for the set of bottom tracks.

21. A storage device comprising:

a storage media including a plurality of data tracks, a data track of the plurality of data tracks including a number of super parity sectors, wherein the number of super parity sectors is selected based on a distance between an inner diameter of the storage media and the data track.

22. The storage device of claim 21, wherein the plurality of data tracks includes a subset of bottom tracks and a subset of top tracks, wherein the data track including the super parity sector is a bottom track of the subset of bottom tracks, and wherein at least one top track of the subset of top tracks does not include one or more super parity sectors.

23. The storage device of claim 22, wherein the subset of top tracks is interlaced with the subset of bottom tracks.

24. The storage device of claim 22, wherein the subset of bottom tracks is written before the subset of top tracks.

25. The storage device of claim 21, wherein the storage media is a PMR system.

26. The storage device of claim 21, wherein the storage media is a BPM system.

27. The storage device of claim 21, wherein the storage media is a SMR system.

28. The storage device of claim 21, wherein the storage media further includes one or more servo sectors.