CALIBRATING OPTIMAL READ LEVELS
First Claim
Patent Images
1. A machine-implemented method, comprising:
- after a predetermined period of time in a life cycle of a flash memory device, reading a plurality of memory cells of the flash memory device a plurality of times, each of the reads using a read level voltage adjusted by a respective one of a plurality of read level offset voltages;
identifying an offset voltage, offset from the read level voltage, that corresponds to a zero crossing point in a range of reliability values corresponding to the plurality of read memory cells; and
setting the read level voltage to a calibrated voltage based on the offset voltage.
8 Assignments
0 Petitions
Accused Products
Abstract
After a predetermined period of time in a life cycle of a flash memory device, a plurality of reliability values corresponding to a plurality of reads of one or more of the plurality of memory cells are generated; each of the reads using a variation of a predetermined read level voltage. An offset voltage is then identified, offset from the read level voltage. The offset voltage corresponds to a zero crossing point in the range of the reliability values. Once the offset voltage is identified, the read level voltage is set to a calibrated voltage based on the offset voltage.
-
Citations
20 Claims
-
1. A machine-implemented method, comprising:
-
after a predetermined period of time in a life cycle of a flash memory device, reading a plurality of memory cells of the flash memory device a plurality of times, each of the reads using a read level voltage adjusted by a respective one of a plurality of read level offset voltages; identifying an offset voltage, offset from the read level voltage, that corresponds to a zero crossing point in a range of reliability values corresponding to the plurality of read memory cells; and setting the read level voltage to a calibrated voltage based on the offset voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. A data storage system, comprising:
-
a plurality of flash memory devices, each flash memory device comprising a plurality of memory blocks; and a controller coupled to the plurality of flash memory devices, wherein the controller is configured to; provide a read level voltage to read memory cells that are programmed to a programming level; after a predetermined number of program/erase cycles, read the memory cells a plurality of times, each of the reads using a read level voltage adjusted by a respective one or a plurality of read level offset voltages; identify an offset voltage, offset from the read level voltage, that corresponds to a zero crossing point in a range of reliability values corresponding to the plurality of read memory cells; and set the read level voltage to a calibrated voltage based on the offset voltage. - View Dependent Claims (12, 13, 14, 15, 16, 17)
-
-
18. A machine-implemented method, comprising:
-
providing a read level for reading memory cells of a flash memory device that are programmed to a programming level; after a predetermined number of program/erase cycles, reading one or more of the memory cells a plurality of times to generate a plurality of reliability values, each of the reads using a read level adjusted by a respective one or a plurality of read level offsets; identifying an offset from the read level that corresponds to a zero crossing point in the range of the reliability values; and adjusting the read level based on the offset. - View Dependent Claims (19, 20)
-
Specification