CONDUCTIVITY BASED ON SELECTIVE ETCH FOR GAN DEVICES AND APPLICATIONS THEREOF
1. A method for generating porous GaN, comprising:
- (a) exposing GaN to an electrolyte;
(b) coupling the GaN to one terminal of a power supply and an electrode immersed in the electrolyte to another terminal of the power supply to thereby form a circuit; and
(c) energizing the circuit to increase the porosity of at least a portion of the GaN.
This invention relates to methods of generating NP gallium nitride (GaN) across large areas (>1 cm2) with controlled pore diameters, pore density, and porosity. Also disclosed are methods of generating novel optoelectronic devices based on porous GaN. Additionally a layer transfer scheme to separate and create free-standing crystalline GaN thin layers is disclosed that enables a new device manufacturing paradigm involving substrate recycling. Other disclosed embodiments of this invention relate to fabrication of GaN based nanocrystals and the use of NP GaN electrodes for electrolysis, water splitting, or photosynthetic process applications.
- 1. A method for generating porous GaN, comprising:
(a) exposing GaN to an electrolyte; (b) coupling the GaN to one terminal of a power supply and an electrode immersed in the electrolyte to another terminal of the power supply to thereby form a circuit; and (c) energizing the circuit to increase the porosity of at least a portion of the GaN.
- View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 51, 52, 53, 54)
- 47. A method of manufacturing nanocrystals, comprising:
(a) providing a material comprising at least one of GaN or InGaN with a thin n-type doped surface layer; (b) exposing the material to an electrolyte; (c) coupling the material to one terminal of a power supply and an electrode immersed in the electrolyte to another terminal of the power supply to thereby form a circuit; (d) energizing the circuit to drive a current through the circuit, wherein the current acts to create a thin porous layer at a surface of the material; and
(e) subjecting the porous layer to a mechanical disturbance to break the porous layer into a nanocrystals.
- View Dependent Claims (48, 55)
- 49. A method of manufacturing an electrode, comprising:
(b) exposing the material to an electrolyte; (c) coupling the material to one terminal of a power supply and an electrode immersed in the electrolyte to another terminal of the power supply to thereby form a circuit; and
(d) energizing the circuit to drive a current through the material, wherein the current acts to create a thin porous layer on the surface to produce a structure suitable for use as an electrode for electrolysis, water splitting, or photosynthetic process applications.
- View Dependent Claims (50, 56)
This application is a continuation-in-part of International Patent Application No. PCT/US2011/022701, filed on Jan. 27, 2011, which claims the benefit of each of U.S. Provisional Patent Application No. 61/298,788, filed on Jan. 27, 2010; U.S. Provisional Patent Application No. 61/326,722, filed on Apr. 22, 2010; U.S. Provisional Patent Application No. 61/347,001, filed on May 21, 2010; U.S. Provisional Patent Application No. 61/347,054, filed on May 21, 2010; U.S. Provisional Patent Application No. 61/369,274, filed on Jul. 30, 2010; U.S. Provisional Patent Application No. 61/369,287, filed on Jul. 30, 2010; U.S. Provisional Patent Application No. 61/369,306, filed on Jul. 30, 2010; U.S. Provisional Patent Application No. 61/369,322, filed on Jul. 30, 2010; U.S. Provisional Patent Application No. 61/369,333, filed on Jul. 30, 2010; U.S. Provisional Patent Application No. 61/371,308, filed on Aug. 6, 2010; and U.S. Provisional Patent Application No. 61/385,300, filed on Sep. 22, 2010. All of the foregoing applications are incorporated by reference herein in their entireties.
Part of the work performed during development of this invention utilized U.S. Government funds under grants DE-FC26-07NT43227, DE-FG0207ER46387, and DE-SCOOO1134 awarded by the U.S. Department of Energy. The U.S. Government has certain rights in this invention.
1. Field of the Invention
This invention relates to the field of processing of GaN based semiconductor materials and forming devices therefrom.
2. Background Art
In the field of semiconductor processing, considerable attention has been paid to the development of porous silicon materials for their beneficial optical and mechanical properties. Porous silicon is typically generated using a wet electrochemical etching process.
Another material of great interest is GaN. The importance of GaN devices in display, data storage, and lighting applications has been clearly established. Over the past two decades the epitaxy of GaN has been explored in depth, but a flexible wet etching procedure is still sought.
The present invention is directed to methods for generating nanoporous NP GaN. One method according to the present invention comprises: exposing GaN to an electrolyte, coupling the GaN to one terminal of a power supply and an electrode, immersed in the electrolyte, to another terminal of the power supply to thereby form a circuit; and energizing the circuit to increase the porosity of at least a portion of the GaN. Accordingly, a material with tunable optical and mechanical properties is produced that can be used in a number of semiconductor-based electronic and optical applications. Methods are also provided for controlling the porosity of GaN to generate useful optical structures such as a distributed Bragg reflector, Fabry-Perot optical filter, and a light emitting diode with enhanced light extraction properties. Also provided are device manufacturing methods using NP GaN substrates and methods for separating NP GaN layers and devices. Lastly, methods are provided for generating nanocrystals from NP GaN and for generating NP GaN electrodes for electrolysis, water splitting, or photosynthetic process applications.
Further features and advantages, as well as the structure and operation of various embodiments, are described in detail below with reference to the accompanying drawings. It is noted that the invention is not limited to the specific embodiments described herein. Such embodiments are presented herein for illustrative purposes only. Additional embodiments will be apparent to persons skilled in the relevant art(s) based on the teachings contained herein.
The accompanying drawings, which are incorporated herein and form part of the specification, illustrate the present invention and, together with the description, further serve to explain the principles of the present invention and to enable a person skilled in the relevant art(s) to make and use the present invention.
This invention provides methods of generating nanoporous (NP) gallium nitride (GaN) across large areas (e.g., greater than one square centimeter) with controlled pore diameters, pore density, and porosity. In addition, these methods are equally applicable for generating NP GaN over smaller areas.
Although GaN is emphasized throughout this specification, these techniques are also applicable to other III-nitride systems such as InGaN. Thus the term “GaN” should be broadly interpreted throughout the specification to mean any III-nitride material such as InGaN, AlGaN, etc. Thus the phrase “NP GaN” can also be interpreted as “NP InGaN” etc.
Nanoporous GaN has great potential for use in re-growth, micro-machining, chemical sensing, and other applications such as semiconductor electronic and optical device manufacturing. It also has applicability for use in nanotechnology applications as described herein. The methods disclosed here can be used to directly produce planar GaN wafers with no need of UV-laser, reactive ion etching, or the like. The methods disclosed are robust and compatible with existing semiconductor manufacturing techniques.
Nanoporous GaN is considered to be a new member of the family of III-nitride compounds. It possesses high crystallinity and optoelectronic quality despite its considerably increased surface area. Several important physical properties are summarized as follows: (1) NP GaN is electrically conducting with measured conductivities comparable to n-type GaN, an attribute important for electrical injection devices, (2) the optical index of refraction can be tuned with porosity for optical confinement and engineering, (3) the elastic compliance (or stiffness) can be modified greatly (sponge-like behavior) while maintaining its single-crystalline nature, and (4) over-growth or re-growth on NP GaN can be carried out in a homoepitaxial manner where the NP surface can be ‘sealed up’ into atomic smoothness in less than 10 nm of GaN growth while the NP nature can still be preserved.
III-Nitride materials are of interest for optical devices (LED, laser) and electronic devices (Enhancement mode and depletion mode HEMTs) due to its special properties (wide direct bandgap, high electrical field drift speed, large thermal conductivity). The presence of high quality III-Nitride materials and devices are c-plane Gallium-polar and Nitrogen-polar III-Nitride, which grown on c-plane sapphire, or Silicon Carbide (SiC). But c-plane III-Nitride materials system has a very strong polarization (spontaneous and piezoelectric polarization), which affects the performance of optical devices (LED, laser etc.), and the Enhancement mode HEMTs. In contrast, nonpolar (a-plane, m-plane) and semipolar (11-22, 20-21, etc) III-Nitride system has no or weak polarization. But the quality of nonpolar and semipolar III-Nitride materials are still poor (high dislocation and stacking faults density, rough surface). In order to improve the quality of nonpolar and semipolar III-Nitride, ELO, interlayer, homoepitaxy, etc. methods were used. In this invention, use porous structures are used as substrate to grow high quality nonpolar and semipolar III-Nitride materials, and to make high performance optical and electrical devices (LED, laser, HEMTs, etc.), and to make the large area nonpolar and semipolar III-Nitride bulk substrates, and reduce the cost.
First, to grow GaN thin film on sapphire (or III-Nitride, SiC, Si, ZnO, LiNbO3, LiAlO2, etc.). Then, to prepare nanoporous (porous) III-Nitride structures by electrochemical etching in acid or alkali solution (e.g. Oxalic Acid (C2O2(OH)2), KOH, NaOH, HF, HCl, HBr, etc.), followed by high quality III-Nitride thin film regrowth on nanoporous structures by MOCVD or HYPE after proper cleaning. Finally, to fabricate high performance optical and electrical devices (LED, LD, HEMTs, etc.) on high quality III-Nitride material, or separating the high quality III-Nitride thin film from the nano-porous substrates. Nanoporous GaN shows good electrical conductivity, comparable to as-grown GaN.
Nanoporous GaN. A new member of III-nitrides. Epitaxial single-crystalline with strain relaxed. Good electrical conductivity—vertical LED. Reduced index of refraction—light extraction. Effective in defect filtering—quality improvement. Reduced bonding strength—substrate liftoff. Reduced mechanical stiffness—compliant. High surface/volume ratio. None-dependent on crystallographic orientations.
According to embodiments of the present invention, a heavily doped (i.e., 1017 to 1019 cm−3) GaN can be selectively removed by an electrochemical (EC) etching with an electrolyte. Both horizontal and vertical etching processes are possible. Horizontal etching starts with epitaxial growth of an n-type doped GaN layer underneath an undoped GaN top layer. Dry etching or cleaving is then employed to expose the sidewalls of the bi- or multi-layer structures. Electrochemical etching then proceeds horizontally and selectively through the n-type GaN underlayers to achieve the undercutting. This invention describes methods of vertical etching of a planar n-type GaN from the surface, where the etching propagates in a direction generally perpendicular to the wafer surface. These methods are disclosed in detail below.
The EC etching process according to embodiments of the invention is illustrated schematically in
Various time-dependent energizing techniques may be employed in which the voltage or current can be pulsed, ramped, or the like. In embodiments of this method, after the EC etching, samples can be rinsed in deionized water, methanol, and pentane, sequentially to minimize surface tension in the final drying process, which ensures complete dissolution of any residue etching chemicals.
The EC etching process is controlled by the degree of n-type doping and the applied voltage as. The observed etching morphology is correlated with the applied voltage (5-30 V) and n-type GaN doping (1018 to 1019 cm−3). The concentration of the oxalic acid can be varied between 0.03 and 0.3 M with no strong dependence observed. The “phase diagram” of EC etching is shown in
The NP GaN morphology resulting from the above described method is illustrated in
Using the electrochemical process described above, one is able to vertically nano-drill through GaN layers and create GaN layers of different pore sizes and porosity, corresponding to layers with different indices of refraction. In embodiments, GaN multi-layer structures can be created by varying an applied voltage, current, or GaN doping profile. Layering structures with a designed index profile, including a quarter-wavelength distributed Bragg reflector (DBR), have many utilities for optical or biomedical applications.
Embodiments will now be described wherein useful opto-electronic structures and devices can be generated. GaN based opto-electronic devices can be used to solve problems in solid state lighting, displays, and power electronics. GaN-based vertical cavity surface emitting lasers (VCSELs) and resonant-cavity light-emitting diodes (RCLEDs) are examples of such devices. An important requirement for the operation of these devices is the need for high reflectance mirrors, usually in the form of distributed Bragg reflectors (DBRs). VCSELs require highly reflective DBR mirrors on both sides of the active region to form a laser cavity, while for the RCLEDs the high reflectance DBRs underneath the active region can improve output power and the emission spectrum. The DBR structures are particularly important for GaN VCSELs in two aspects. First, the threshold current density of a GaN VCSEL can be reduced by an order of magnitude with an increase of the DBR peak reflectance from 90% to 99%. Second, the DBRs should have large stop bandwidth. This is important because the active region of a GaN-based VCSEL is typically made of InGaN multiple quantum wells (MQWs), and the emission peak of the InGaN MQWs tends to fluctuate with small variations in either the growth conditions or the process parameters. A DBR with wide stop band can provide sufficient coverage of such spectral variation in emission wavelength.
Embodiments directed to methods of forming NP GaN multilayer structures are disclosed.
For the embodiments illustrated in
In another embodiment, a pulsed-etching method is used, to achieve very high porosity toward a very low refractive index, as illustrated in
Having established a control of the porosity in NP GaN, one can envision a new class of monocrystalline NP GaN layers with a tunable index of refraction. Examples of such materials are shown in feature 608 of
A NP GaN layer with about 30% porosity can produce a index contrast tantamount to that of an AlN layer, while the AlGaN cladding layers typically employed in 410-nm laser diodes (AI-15%, thickness-0.5 micron) can be replaced by NP GaN layers with about 5% porosity for effective wave-guiding.
These embodiments provide a simple, flexible way to fabricate large-scale NP GaN multilayer for optical and biomedical applications. Advantages and applications thereof include: (1) GaN-based DBR pairs with increased refractive index contrast, (2) low cost GaN-based VCSELs and RCLEDs, (3) Fabry-Perot filters, (4) antireflection coatings for energy conversion, (5) optical biosensors, and (6) substrates for III-nitride materials and device growth.
Further embodiments directed to methods of using NP substrates include techniques to: (1) make polar, nonpolar and semipolar NP III-Nitride structures on sapphire (or III-Nitride, SiC, Si, ZnO, LiNbO3, LiAlO2, etc.) substrates by electrochemical etching, (2) grow high quality polar, nonpolar and semipolar III-Nitride materials on NP structures, (3) fabricate polar, nonpolar and semipolar III-Nitride optoelectronic devices (LEDs, laser, etc.) and electronic devices such as high electron mobility transistors (HEMTs) using re-grown III-Nitride materials, and (4) produce polar, nonpolar and semipolar III-Nitride bulk substrates using the re-grown III-Nitride materials on NP III-Nitride structure by HYPE.
The NP GaN surface, illustrated in the upper and lower right portions of
Experimental results corresponding to the embodiments of
SEM images in
This realization enables us to design growth processes where we can grow GaN on a nanoporous template and quickly planarize the surface. Concurrently the buried nanoporous layer undergoes transformation to form large voids through which the attachment of the upper epitaxial layer to the underlying layer or substrate is greatly weakened. In other words we disclose a process of epitaxial growth of GaN layers and devices on a metastable nanoporous single-crystalline template, with a surface morphology sufficiently smooth to support initial nucleation and planarization. The metastable nanoporous GaN itself undergoes void formation in-situ with weakening bonding between the upper layers and the substrates. At the same time this transformation does not adversely affect the epitaxial process. After growth, the nanoporous GaN layer remains loosely attached to the substrate, an example is shown in
An important point to emphasize is that macroscopic crystallinity, over hundreds or even thousands of micrometers, is preserved since the GaN layers or devices are mechanically supported throughout every step. In
Alternatively, in a further embodiment, GaN thin layers with engineered doping profiles can be conducive to a simpler EC etching procedure. This process is illustrated in of
The above disclosed embodiments can provide a simple, large-area transfer of GaN epilayers for device fabrication that could dramatically lower the cost while enhancing their functionality. The only competing technique is laser lift-off (LLO) which is expensive, time-consuming, not scalable, and has a problematic yield.
Using a novel electrochemical process, we are able to (nano)drill through GaN layers and create buried high-porosity (or two layer) region. The buried high-porosity region undergoes transformation during thermal annealing and MOCVD growth into large bubbles and coalesced voids that will facilitate in-plane fracturing, layer separation, and epitaxial wafer transfer, a process that has never been proposed in GaN fabrication and is likely to change the paradigm in III-nitride material growth and device fabrication. Key steps include (1) electrochemical porosification (
A two-step porosification process was developed to create a vertical profile with a high porosity region around 0.5 to 1 m below the surface, protected (or sealed) by a low-porosity region (
After annealing we observed the desirable morphology (
The morphology shown in
Applications of the disclosed embodiments include transfer of GaN on a silicon wafer to another template that has good thermal expansion match with GaN. One can prepare a thin GaN layer on very large silicon wafers (greater than about six inches), while maintaining pseudomorphism. This would be a unique approach to produce 6 inch, 8 inch or even 12 inch NP GaN substrates for future LED and transistor industry.
The ability to transfer thin films from one substrate to another has other useful device applications, such as transferring NP GaN LED thin films and transistors to flexible and/or transparent substrates. As another application, it is possible to transfer GaN thin layers from bulk HYPE-grown GaN substrates. As such, this approach would be a simple and inexpensive method to mass-produce dislocation-free NP GaN thin films.
A further embodiment, shown in
A device structure 1322 can be grown (e.g., using a method such as MOCVD) on the NP substrate 1320. The device structure can be bonded to a carrier wafer 1324 and the combined device structure/carrier wafer system 1326/1328 can be separated from the NP substrate. The remaining NP substrate 1330 can be further smoothed and reclaimed so that the process can be repeated.
We note that the same concept can be implemented on Al2O3 (as an LLO replacement), SiC, Si, GaN and other substrates. This embodiment enables one to recycle the substrates used for III-nitride materials growth and device fabrication, leading to reduced cost.
The remaining surface is still NP, after wafer splitting, as shown previously in
The same reclaiming cycle illustrated in
The above disclosed device manufacturing embodiments provide a simple, robust route to recycle the substrates for III-nitride thin film growth and device fabrication that can dramatically lower the cost while enhancing functionality.
Several economic advantages and applications of the disclosed substrate recycling methods include the following. These methods can dramatically reduce the price of III-nitride materials and the fabrication of devices, such as vertical LEDs. These methods are equally applicable for use with other common substrates (such as sapphire, SiC, Si, GaN, AlN etc.) used to grow III-nitride materials. These methods also enable the production of GaN-on-Insulator (GaNOI) structures for electronics applications as well as enabling the production of high quality GaN epilayers.
A further embodiment of the invention relates to the generation of NP GaN based nanocrystals. Using the electrochemical process disclosed in previous embodiments, fibrous-like monocrystalline GaN materials with greatly weakened mechanical strength, can be produced. The reduction in mechanical strength is due to a change in the aspect ratio and the greatly increased surface area of the fibrous-like materials. The NP GaN is more susceptible to mechanical fracturing and breaking through a sonication (or grinding) process into nanometer-size nanocrystals that are of interest in fluorescence-labeling, photovoltaics, display-lighting, and nanoelectronics.
An embodiment for producing GaN nanocrystals is illustrated in
The observed turbidity in the sonicated solution is due to the aggregate of GaN nanocrystals (NC) into micron-size particulates causing diffusive scattering.
A further embodiment of the porosification-sonication process incorporates a two-stage electrochemical etching process. The particular step required in EC porosification is to create a buried layer with very high porosity to undercut and release the upper NP GaN layer into a membrane form, as shown in
The above embodiments provide an elegant method to produce colloidal GaN and InGaN nanocrystals. Economic advantages and possible applications to this new technique include but are not limited to: fabricating light emitting diodes or Laser diodes using nanocrystals, use of nanocrystals as fluorescent biological labels for biomedical applications, use of nanocrystal GaN or InGaN Hybrids with polymers for photovoltaic applications, and use of nanocrystal GaN or InGaN hybrids with catalytic metal (like gold, nickel, etc.) for energy applications.
A further embodiment relates to the use of NP GaN and NP InGaN as the photo-anode or photo-cathode in photosynthetic processes, water splitting, and hydrogen production. The electrochemical etching process used to produce NP GaN was described above. The use of NP GaN or NP InGaN has the advantages of (1) enhanced photon absorption, (2) improved photosynthetic efficiency, and (3) reduced photo electrode degradation.
Factors such as heteroepitaxial strain (11% mismatch between InN and GaN), dislocations, nanoscopic morphology such as faceting/roughening, and surface kinetics, are all responsible for the complex interplay. An emerging consensus is that the interaction of the aforementioned factors could lead to a macroscopic (over the length scale of 50-100 nm) inhomogeneous distribution of In composition in InGaN epilayer or quantum well, producing fluctuations in the bandgap of a few hundreds of meV (˜400 meV). Furthermore, regions with high band gaps (or low In compositions) tend to coincide with the presence of non-radiative dislocations due to either reduced incorporation or enhanced desorption of Indium. Carriers are therefore localized in regions away from dislocations. Such a self-screening process is thought to be crucial in achieving high IQE. The growth of InGaN under “optimal” conditions to induce nonplanar and inhomogeneous incorporations of Indium has been the conventional approach adopted by many companies and may be reaching its limitation.
In this invention, we explore the growth of InGaN on an inherently three-dimensional (3D) and nanoporous (NP) GaN template. The preparation of NP GaN by an electrochemical etching was described in an earlier provisional disclosure (61/326,722 disclosed on Apr. 22, 2010). We feel the new NP GaN template offers advantages for the preparation of InGaN active medium over conventional planar GaN templates in the following ways: 1) The NP GaN provides numerous crystallographic facets concurrently over nanometer scale; this will accentuate the disparity and anisotropy in the incorporation of Indium and enhance the localization effect. 2) The NP GaN template, with its percolated nature, would provide a built-in, in-plane localization based on geometry. 3) The NP GaN is likely to have a reduced density of dislocations. 4) The NP GaN template, with its fibrous nature and a very high surface-to-volume ratio, will help to relieve heteroepitaxial strains during InGaN growth.
To test this idea, we have grown InGaN (0.2 m) on NP GaN with different porosities (˜40 nm and ˜60 nm pores), as well as a standard planar GaN template. The NP GaN and standard planar GaN templates were loaded into a MOCVD reactor, heated briefly to 1000° C. in a H2/NH3 mixture for cleaning, then lowered to 820° C. in H2/NH3 when growth of InGaN commenced after temperature stabilization.
The photoluminescence spectra of the 3 samples are shown in
The advantages of InGaN layers grown directly on nanoporous GaN have been listed above in Section II.C. Possible impacts of this invention may include: 1. The fabrication of long wavelength (green, yellow, amber, and red) LEDs with high efficiency to overcome the so-called “green-gap” issue. 2. A solution of efficiency droop in InGaN LEDs. 3. Applications in the fields of high efficiency Photovoltaic devices (solar cell, photoelectrochemical cell, et al.)
The use of NP GaN or NP indium gallium nitride (InGaN) has the advantages of 1) enhanced photon absorption, 2) improved photosynthetic efficiency, and 3) reduced photoelectrode degradation. Water splitting Experiments. Electrolyte: 1M NaCl, 1M KOH, 1M HCL. Light source: 200 W Hg(Xe) lamp focused onto 1×1 cm2 spot. Nanoporous GaN. Increased surface area. Better chance for photo-excited carriers to reach semiconductor-electrolyte interface.
Nanoporous GaN was used as a photoanode for WS. Improved WS efficiency. No photocurrent saturation at large bias. Increased surface area. Light scattering by nanoporous structure. Enhanced PC stability. Distributed WS reaction on nanopore walls. Immune to the PEC etching near top surface. Nanoporous GaN is an important photoanode material for WS. Better efficiency under concentrated solar light.
An advantage of using a NP anode is illustrated in measurements presented in
It is to be appreciated that the Detailed Description section, and not the Summary and Abstract sections, is intended to be used to interpret the claims. The Summary and Abstract sections may set forth one or more but not all exemplary embodiments or advantages of the present invention as contemplated by the inventor(s), and thus, are not intended to limit the present invention and the appended claims in any way.
The foregoing description of the specific embodiments will so fully reveal the general nature of the invention that others can, by applying knowledge within the skill of the art, readily modify and/or adapt, for various applications, such specific embodiments, without undue experimentation, without departing from the general concept of the present invention. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance.
The breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.