METHOD FOR MANAGING AN ARCHITECTURE AND ASSOCIATED ARCHITECTURE

• US 20160154640A1
• Filed: 11/25/2015
• Published: 06/02/2016
• Est. Priority Date: 11/27/2014
• Status: Active Grant

• Current Assignee: Thales SA
• Original Assignee: Thales SA
• Inventors: SALIBA, Eric, GUREGHIAN, Emmanuel, NORTIER, Cdric
• Granted Patent: US 10,481,888 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 21/53 by executing in a restricted environment, e.g. sandbox or secure virtual machine
• CPC Class Codes: G06F 2221/2141 Access rights, e.g. capability lists, access control lists, access tables, access matrices
• CPC Class Codes: G06F 2221/2149 Restricted operating environment
• CPC Class Codes: G06F 8/61 Installation
• CPC Class Codes: G06F 9/455 Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
• CPC Class Codes: G06F 9/5077 Logical partitioning of resources; Management or configuration of virtualized resources specific details on emulation or internal functioning of virtual machines G06F9/455

Abstract

The invention relates to a method for managing an architecture, wherein the architecture comprises a main platform including a plurality of partitions for executing software, and at least one secondary platform. The method further comprises at least one step of associating each partition of the main platform with at least one processing member by installing, for each partition and each processing member, a driver specific to the relevant partition, the driver ensuring a secured link between the relevant partition and the operating member(s) with which the partition is associated.

Claims

1. A method for managing an architecture, the architecture including:

a main platform including a plurality of partitions for executing software, and

at least one secondary platform, each secondary platform comprising a plurality of processing members, each processing member being able to apply secured processing operations for the account of at least one partition and each processing member being physically partitioned relatively to the other processing members,

the method including at least;

associating each partition of the main platform with at least one processing member by installing, for each partition and each processing member, a driver specific to the relevant partition, the driver ensuring a secured link between the relevant partition and the processing member(s) with which the partition is associated.

2. The method according to claim 1, wherein each partition includes a first transceiver element and each processing member includes a second transceiver element, each installed secured link being able to ensure encrypted communication between a first transceiver element and a second transceiver element.

3. The method according to claim 2, wherein the main platform and said at least one secondary platform at least share a communication interface able to ensure exchange of data in cut-off between the main platform and said at least one secondary platform.

4. The method according to claim 1, wherein the method further includes:

partitioning of the main platform into a plurality of partitions under the control of a hypervisor.

5. The method according to claim 1, wherein the method further includes:

partitioning of the secondary platform into a plurality of processing members.

6. The method according to claim 1, wherein each partition is associated with one or several processing members, said processing members not being associated with other partitions.

7. The method according to claim 1, wherein the main platform is a programmable microprocessor.

8. The method according to claim 1, wherein the secondary platform is a programmable logic circuit.

9. An architecture including:

a main platform including a plurality of partitions for executing software, and

at least one secondary platform, each secondary platform comprising a plurality of processing members, each processing member being able to apply processing operations secured for the account of at least one partition and each processing member being physically partitioned relatively to the other processing members,

each partition including a specific driver, each driver ensuring the secured link between the partition and at least one processing member with which the partition is associated.

10. The architecture according to claim 9, wherein each partition is able to apply a man-machine interface allowing a user to access a service.