PIXEL STRUCTURE AND DRIVING METHOD THEREOF, AND DISPLAY APPARATUS

• US 20160155385A1
• Filed: 10/11/2014
• Published: 06/02/2016
• Est. Priority Date: 07/07/2014
• Status: Active Grant

• Current Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.), BOE Technology Group Co., Ltd.
• Original Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.), BOE Technology Group Co., Ltd.
• Inventors: Yang, Shengji
• Granted Patent: US 9,972,248 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 3/03545 Pens or stylus
• CPC Class Codes: G06F 3/03548 Sliders, in which the moving part moves in a plane
• CPC Class Codes: G06F 3/042 by opto-electronic means
• CPC Class Codes: G06F 3/044 by capacitive means
• CPC Class Codes: G09G 2300/0465 Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2320/045 Compensation of drifts in the characteristics of light emitting or modulating elements
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3258 with pixel circuitry controlling the voltage across the light-emitting element

Abstract

Provided are a pixel structure and driving method thereof, and a display apparatus. The pixel structure comprises a plurality of pixel units and compensation units corresponding to the pixel units. Each of the pixel units comprises two adjacent pixel circuits which are a first pixel circuit and a second pixel circuit. The first pixel circuit comprises a first driving transistor (DTFT1) and a first display device (OLED1), and the second pixel circuit comprises a second driving transistor (DTFT2) and a second display device (OLED2), wherein the first pixel circuit and the second pixel circuit share the compensation unit and are controlled by a same data line (Data). The compensation unit is configured to adjust a gate voltage of the first driving transistor (DTFT1) in the first pixel circuit to eliminate the influence of the threshold voltage of the first driving transistor (DTFT1) on the driving current of the first display device (OLED1), and to adjust a gate voltage of the second driving transistor (DTFT2) in the second pixel circuit to eliminate the influence of the threshold voltage of the second driving transistor (DTFT2) on the driving current of the second display device (OLED2). The pixel structure can reduce the pixel size and obtain higher resolution.

Claims

1. A pixel structure comprising a plurality of pixel units, wherein the pixel structure further comprises compensation units corresponding to the pixel units, each of the pixel units comprises two adjacent pixel circuits which are a first pixel circuit and a second pixel circuit, the first pixel circuit comprises a first driving transistor and a first display device, the second pixel circuit comprises a second driving transistor and a second display device, and the first pixel circuit and the second pixel circuit share the compensation unit and are controlled by a same data line;

the compensation unit is configured to adjust a gate voltage of the first driving transistor in the first pixel circuit to eliminate the influence of the threshold voltage of the first driving transistor on the driving current of the first display device, and to adjust a gate voltage of the second driving transistor in the second pixel circuit to eliminate the influence of the threshold voltage of the second driving transistor on the driving current of the second display device.

2. The pixel structure according to claim 1, wherein the compensation unit comprises a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor, a fifth switch transistor, a sixth switch transistor, a seventh switch transistor, an eighth switch transistor, a ninth switch transistor, a tenth switch transistor, a first storage capacitor, and a second storage capacitor;

a gate of the first switch transistor is connected to a gate of the second switch transistor, a gate of the seventh transistor, and a first light emitting control line, a source of the first switch transistor is connected to a source of the second switch transistor and a first reference voltage source, and a drain of the first switch transistor is connected to a source of the fourth switch transistor and a source of the first driving transistor;

the gate of the second switch transistor is connected to a gate of the eighth switch transistor, a drain of the second switch transistor is connected to a source of the fifth switch transistor and a source of the second driving transistor;

a gate of the third switch transistor is connected to a gate of the fourth switch transistor and a first scan line, a source of the third switch transistor is connected to a data line, a drain of the third switch transistor is connected to a second terminal of the first storage capacitor and a source of the seventh switch transistor;

a drain of the fourth switch transistor is connected to a first terminal of the first storage capacitor and a gate of the first driving transistor;

a gate of the fifth switch transistor is connected to a gate of the sixth switch transistor and a second scan line, a source and a drain of the fifth switch transistor are connected to a first terminal of the second storage capacitor and a gate of the second driving transistor;

a source of the sixth switch transistor is connected to the data line, a drain of the sixth switch transistor is connected to a second terminal of the second storage capacitor and a drain of the eighth switch transistor;

a drain of the seventh switch transistor is connected to a source of the ninth switch transistor, a drain of the first driving transistor, and a first terminal of the first display device, and a second terminal of the first display device is grounded;

a source of the eighth switch transistor is connected to a source of the tenth switch transistor, a drain of the second driving transistor, and a first terminal of the second display device, and a second terminal of the second display device is grounded;

a gate of the ninth switch transistor is connected to a gate of the tenth switch transistor and the second scan line, and a drain of the ninth switch transistor is grounded;

a drain of the tenth switch transistor is grounded.

3. The pixel structure according to claim 2, wherein the first switch transistor, the second switch transistor, the third switch transistor, the fourth switch transistor, the fifth switch transistor, the sixth switch transistor, the seventh switch transistor, the eighth switch transistor, the ninth switch transistor, the tenth switch transistor, the first driving transistor, the second driving transistor are all N type thin film transistors.

4. The pixel structure according to claim 1, wherein the compensation unit comprises an eleventh switch transistor, a twelfth switch transistor, a thirteenth switch transistor, a fourteenth switch transistor, a fifteenth switch transistor, a sixteenth switch transistor, a seventeenth switch transistor, an eighteenth switch transistor, a nineteenth switch transistor, a third storage capacitor, and a fourth storage capacitor;

a gate of the eleventh switch transistor is connected to a second light emitting control line, a source of the eleventh switch transistor is connected to the first reference voltage source, a drain of the eleventh switch transistor is connected to the source of the first driving transistor and the source of the second driving transistor;

a gate of the twelfth switch transistor is connected to a third scan line, a source of the twelfth switch transistor is connected to the data line, a drain of the twelfth switch transistor is connected to a source of the thirteenth switch transistor and a first terminal of the third storage capacitor;

a gate of the thirteenth switch transistor is connected to a gate of the fourteenth switch transistor and a third light emitting control line, and a drain of the thirteenth switch transistor is grounded;

a source of the fourteenth switch transistor is connected to a first terminal of the fourth storage capacitor and a drain of the fifteenth switch transistor, and a drain of the fourteenth switch transistor is grounded;

a gate of the fifteenth switch transistor is connected to a fourth scan line, and a source of the fifteenth switch transistor is connected to the data line;

a gate of the sixteenth switch transistor is connected to a gate of the seventeenth switch transistor and a third light emitting control line, a source of the sixteenth switch transistor is connected to the gate of the first driving transistor and a second terminal of the third storage capacitor, a drain of the sixteenth switch transistor is connected to the drain of the first driving transistor and a source of the eighteenth switch transistor;

a source of the seventeenth switch transistor is connected to the gate of the second driving transistor and a second terminal of the fourth storage capacitor, a drain of the seventeenth switch transistor is connected to the drain of the second driving transistor and a source of the nineteenth switch transistor;

a gate of the eighteenth switch transistor is connected to a gate of the nineteenth switch transistor and a fourth light emitting control line, a drain of the eighteenth switch transistor is connected to the first terminal of the first display device, and the second terminal of the first display device is grounded;

a drain of the nineteenth switch transistor is connected to the first terminal of the second display device, and the second terminal of the second display device is grounded.

5. The pixel structure according to claim 4, wherein the pixel structure further comprises a capacitive touch unit and a light sensitive type touch unit connected to the compensation unit;

the capacitive touch unit is configured to generate a corresponding electrical signal according to a touch signal and realize touch and control by a finger;

the light sensitive type touch unit is configured to generate a corresponding electrical signal according to an illumination intensity signal and realize touch and control by a laser pen.

6. The pixel structure according to claim 5, wherein the capacitive touch unit comprises a first capacitive transistor, a second capacitive transistor, a third capacitive transistor, a fifth storage capacitor and a touch electrode;

a gate of the first capacitive transistor is connected to the light sensitive type touch unit and the third light emitting control line, a source of the first capacitive transistor is connected to the data line, a drain of the first capacitive transistor is connected to a first terminal of the fifth storage capacitor and a gate of the second capacitive transistor;

a source of the second capacitive transistor is connected to a drain of the third capacitive transistor, a drain of the second capacitive transistor is connected to a second terminal of the fifth storage capacitor and a common electrode;

a gate of the third capacitive transistor is connected to the third scan line, a source of the third capacitive transistor is connected to a read line;

the touch electrode is connected to the gate of the second capacitive transistor.

7. The pixel structure according to claim 6, wherein the light sensitive type touch unit comprises a first light sensitive type transistor, a second light sensitive type transistor, a third light sensitive type transistor, a light sensitive transistor, and a sixth storage capacitor;

a gate of the light sensitive transistor is connected to a source of the first light sensitive type transistor, a source of the second light sensitive type transistor and a first terminal of the sixth storage capacitor, a drain of the light sensitive transistor is connected to a second terminal of the sixth storage capacitor and a source of the third light sensitive type transistor, and a source of the light sensitive transistor is connected to a source of the second light sensitive type transistor;

a gate of the first light sensitive type transistor is connected to the capacitive touch unit, and a drain of the first light sensitive type transistor is grounded;

a gate of the second light sensitive type transistor is connected to the fourth scan line, a drain of the second light sensitive type transistor is connected to the data line;

a gate of the third light sensitive type transistor is connected to the fourth light emitting control line, and a drain of the third light sensitive type transistor is connected to the read line.

8. The pixel structure according to claim 4, wherein the eleventh switch transistor, the twelfth switch transistor, the thirteenth switch transistor, the fourteenth switch transistor, the fifteenth switch transistor, the sixteenth switch transistor, the seventeenth switch transistor, the eighteenth switch transistor, the nineteenth switch transistor, the first driving transistor, the second driving transistor are all P type thin film transistors.

9. The pixel structure according to claim 6, wherein all the transistors are P type thin film transistors.

10. The pixel structure according to claim 7, wherein the light sensitive transistor is an N type thin film transistor, the other transistors are all P type thin film transistors.

11. A driving method of a pixel structure, wherein the pixel structure is a pixel structure according to claim 1, and the driving method comprising steps of:

at a threshold compensation phase, by the compensation unit, adjusting the gate voltage of the first driving transistor in the first pixel circuit to eliminate the influence of the threshold voltage of the first driving transistor on the driving current of the first display device and adjusting the gate voltage of the second driving transistor in the second pixel circuit to eliminate the influence of the threshold voltage of the second driving transistor on the driving current of the second display device.

15. A display apparatus comprising a pixel structure according to claim 1.

16. The pixel structure according to claim 5, wherein the eleventh switch transistor, the twelfth switch transistor, the thirteenth switch transistor, the fourteenth switch transistor, the fifteenth switch transistor, the sixteenth switch transistor, the seventeenth switch transistor, the eighteenth switch transistor, the nineteenth switch transistor, the first driving transistor, the second driving transistor are all P type thin film transistors.

17. The driving method of the pixel structure according to claim 11, wherein the compensation unit comprises a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor, a fifth switch transistor, a sixth switch transistor, a seventh switch transistor, an eighth switch transistor, a ninth switch transistor, a tenth switch transistor, a first storage capacitor, and a second storage capacitor;

a gate of the first switch transistor is connected to a gate of the second switch transistor, a gate of the seventh transistor, and a first light emitting control line, a source of the first switch transistor is connected to a source of the second switch transistor and a first reference voltage source, and a drain of the first switch transistor is connected to a source of the fourth switch transistor and a source of the first driving transistor;

the gate of the second switch transistor is connected to a gate of the eighth switch transistor, a drain of the second switch transistor is connected to a source of the fifth switch transistor and a source of the second driving transistor;

a gate of the third switch transistor is connected to a gate of the fourth switch transistor and a first scan line, a source of the third switch transistor is connected to a data line, a drain of the third switch transistor is connected to a second terminal of the first storage capacitor and a source of the seventh switch transistor;

a drain of the fourth switch transistor is connected to a first terminal of the first storage capacitor and a gate of the first driving transistor;

a gate of the fifth switch transistor is connected to a gate of the sixth switch transistor and a second scan line, a source and a drain of the fifth switch transistor are connected to a first terminal of the second storage capacitor and a gate of the second driving transistor;

a source of the sixth switch transistor is connected to the data line, a drain of the sixth switch transistor is connected to a second terminal of the second storage capacitor and a drain of the eighth switch transistor;

a drain of the seventh switch transistor is connected to a source of the ninth switch transistor, a drain of the first driving transistor, and a first terminal of the first display device, and a second terminal of the first display device is grounded;

a source of the eighth switch transistor is connected to a source of the tenth switch transistor, a drain of the second driving transistor, and a first terminal of the second display device, and a second terminal of the second display device is grounded;

a gate of the ninth switch transistor is connected to a gate of the tenth switch transistor and the second scan line, and a drain of the ninth switch transistor is grounded;

a drain of the tenth switch transistor is grounded.

18. The driving method of the pixel structure according to claim 17, wherein the first switch transistor, the second switch transistor, the third switch transistor, the fourth switch transistor, the fifth switch transistor, the sixth switch transistor, the seventh switch transistor, the eighth switch transistor, the ninth switch transistor, the tenth switch transistor, the first driving transistor, the second driving transistor are all N type thin film transistors.

19. The driving method of the pixel structure according to claim 11, wherein the compensation unit comprises an eleventh switch transistor, a twelfth switch transistor, a thirteenth switch transistor, a fourteenth switch transistor, a fifteenth switch transistor, a sixteenth switch transistor, a seventeenth switch transistor, an eighteenth switch transistor, a nineteenth switch transistor, a third storage capacitor, and a fourth storage capacitor;

a gate of the eleventh switch transistor is connected to a second light emitting control line, a source of the eleventh switch transistor is connected to the first reference voltage source, a drain of the eleventh switch transistor is connected to the source of the first driving transistor and the source of the second driving transistor;

a gate of the twelfth switch transistor is connected to a third scan line, a source of the twelfth switch transistor is connected to the data line, a drain of the twelfth switch transistor is connected to a source of the thirteenth switch transistor and a first terminal of the third storage capacitor;

a gate of the thirteenth switch transistor is connected to a gate of the fourteenth switch transistor and a third light emitting control line, and a drain of the thirteenth switch transistor is grounded;

a source of the fourteenth switch transistor is connected to a first terminal of the fourth storage capacitor and a drain of the fifteenth switch transistor, and a drain of the fourteenth switch transistor is grounded;

a gate of the fifteenth switch transistor is connected to a fourth scan line, and a source of the fifteenth switch transistor is connected to the data line;

a gate of the sixteenth switch transistor is connected to a gate of the seventeenth switch transistor and a third light emitting control line, a source of the sixteenth switch transistor is connected to the gate of the first driving transistor and a second terminal of the third storage capacitor, a drain of the sixteenth switch transistor is connected to the drain of the first driving transistor and a source of the eighteenth switch transistor;

a source of the seventeenth switch transistor is connected to the gate of the second driving transistor and a second terminal of the fourth storage capacitor, a drain of the seventeenth switch transistor is connected to the drain of the second driving transistor and a source of the nineteenth switch transistor;

a gate of the eighteenth switch transistor is connected to a gate of the nineteenth switch transistor and a fourth light emitting control line, a drain of the eighteenth switch transistor is connected to the first terminal of the first display device, and the second terminal of the first display device is grounded;

a drain of the nineteenth switch transistor is connected to the first terminal of the second display device, and the second terminal of the second display device is grounded.

20. The driving method of the pixel structure according to claim 19, wherein the pixel structure further comprises a capacitive touch unit and a light sensitive type touch unit connected to the compensation unit;

the capacitive touch unit is configured to generate a corresponding electrical signal according to a touch signal and realize touch and control by a finger;

the light sensitive type touch unit is configured to generate a corresponding electrical signal according to an illumination intensity signal and realize touch and control by a laser pen.

21. The driving method of the pixel structure according to claim 20, wherein the capacitive touch unit comprises a first capacitive transistor, a second capacitive transistor, a third capacitive transistor, a fifth storage capacitor and a touch electrode;

a gate of the first capacitive transistor is connected to the light sensitive type touch unit and the third light emitting control line, a source of the first capacitive transistor is connected to the data line, a drain of the first capacitive transistor is connected to a first terminal of the fifth storage capacitor and a gate of the second capacitive transistor;

a source of the second capacitive transistor is connected to a drain of the third capacitive transistor, a drain of the second capacitive transistor is connected to a second terminal of the fifth storage capacitor and a common electrode;

a gate of the third capacitive transistor is connected to the third scan one, a source of the third capacitive transistor is connected to a read line;

the touch electrode is connected to the gate of the second capacitive transistor.

22. The driving method of the pixel structure according to claim 21, wherein the light sensitive type touch unit comprises a first light sensitive type transistor, a second light sensitive type transistor, a third light sensitive type transistor, a light sensitive transistor, and a sixth storage capacitor;

a gate of the light sensitive transistor is connected to a source of the first light sensitive type transistor, a source of the second light sensitive type transistor and a first terminal of the sixth storage capacitor, a drain of the light sensitive transistor is connected to a second terminal of the sixth storage capacitor and a source of the third light sensitive type transistor, and a source of the light sensitive transistor is connected to a source of the second light sensitive type transistor;

a gate of the first light sensitive type transistor is connected to the capacitive touch unit, and a drain of the first light sensitive type transistor is grounded;

a gate of the second light sensitive type transistor is connected to the fourth scan one, a drain of the second light sensitive type transistor is connected to the data line;

a gate of the third light sensitive type transistor is connected to the fourth light emitting control fine, and a drain of the third light sensitive type transistor is connected to the read line.

23. The driving method of the pixel structure according to claim 19, wherein the eleventh switch transistor, the twelfth switch transistor, the thirteenth switch transistor, the fourteenth switch transistor, the fifteenth switch transistor, the sixteenth switch transistor, the seventeenth switch transistor, the eighteenth switch transistor, the nineteenth switch transistor, the first driving transistor, the second driving transistor are all P type thin film transistors.

12-14. -14. (canceled)