EVENT-DRIVEN UNIVERSAL NEURAL NETWORK CIRCUIT
First Claim
1. A method comprising:
- at a neural network circuit comprising a plurality of neurons interconnected via a plurality of synapses;
applying a first set of learning rules to a first set of synapses of the plurality of synapses, wherein the first set of synapses has a first synapse type;
applying a second set of learning rules to a second set of synapses of the plurality of synapses, wherein the second set of synapses has a second synapse type, and the second set of learning rules is a reverse of the first set of learning rules;
receiving at least one input event at a first set of neurons of the plurality of neurons; and
generating at least one output event at a second set of neurons of the plurality of neurons.
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Abstract
The present invention provides an event-driven universal neural network circuit. The circuit comprises a plurality of neural modules. Each neural module comprises multiple digital neurons such that each neuron in a neural module has a corresponding neuron in another neural module. An interconnection network comprising a plurality of digital synapses interconnects the neural modules. Each synapse interconnects a first neural module to a second neural module by interconnecting a neuron in the first neural module to a corresponding neuron in the second neural module. Corresponding neurons in the first neural module and the second neural module communicate via the synapses. Each synapse comprises a learning rule associating a neuron in the first neural module with a corresponding neuron in the second neural module. A control module generates signals which define a set of time steps for event-driven operation of the neurons and event communication via the interconnection network.
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Citations
19 Claims
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1. A method comprising:
at a neural network circuit comprising a plurality of neurons interconnected via a plurality of synapses; applying a first set of learning rules to a first set of synapses of the plurality of synapses, wherein the first set of synapses has a first synapse type; applying a second set of learning rules to a second set of synapses of the plurality of synapses, wherein the second set of synapses has a second synapse type, and the second set of learning rules is a reverse of the first set of learning rules; receiving at least one input event at a first set of neurons of the plurality of neurons; and generating at least one output event at a second set of neurons of the plurality of neurons. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A neural network circuit, comprising:
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a plurality of neurons; and a plurality of synapses interconnecting the plurality of neurons; wherein the plurality of neurons comprise a first set of neurons for receiving at least one input event; wherein the plurality of neurons further comprises a second set of neurons for generating at least one output event; wherein a first set of learning rules is applied to a first set of synapses of the plurality of synapses, the first set of synapses having a first synapse type; and wherein a second set of learning rules is applied to a second set of synapses of the plurality of synapses, the second set of synapses having a second synapse type, and the second set of learning rules is a reverse of the first set of learning rules. - View Dependent Claims (9, 10, 11, 12, 13)
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14. A computer program product comprising a computer-readable hardware storage medium having program code embodied therewith, the program code being executable by a computer to implement a method comprising:
at a neural network circuit comprising a plurality of neurons interconnected via a plurality of synapses; applying a first set of learning rules to a first set of synapses of the plurality of synapses, wherein the first set of synapses has a first synapse type; applying a second set of learning rules to a second set of synapses of the plurality of synapses, wherein the second set of synapses has a second synapse type, and the second set of learning rules is a reverse of the first set of learning rules; receiving at least one input event at a first set of neurons of the plurality of neurons; and generating at least one output event at a second set of neurons of the plurality of neurons. - View Dependent Claims (15, 16, 17, 18, 19)
Specification