SEMICONDUCTOR DEVICES WITH STRUCTURES FOR SUPPRESSION OF PARASITIC BIPOLAR EFFECT IN STACKED NANOSHEET FETS AND METHODS OF FABRICATING THE SAME

• US 20160163796A1
• Filed: 11/25/2015
• Published: 06/09/2016
• Est. Priority Date: 12/05/2014
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Obradovic, Borna J., Hatcher, Ryan, Bowen, Robert C., Rodder, Mark S.
• Granted Patent: US 9,461,114 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: B82B 3/0014 Array or network of similar nanostructural elements
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H01L 29/0642 Isolation within the component, i.e. internal isolation
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0665 the shape of the body defining a nanostructure nanotechnology per se B82B
• CPC Class Codes: H01L 29/0676 oriented perpendicular or at an angle to a substrate
• CPC Class Codes: H01L 29/16 including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/78681 having a semiconductor body comprising AIIIBV or AIIBVI or AIVBVI semiconductor materials, or Se or Te
• CPC Class Codes: H01L 29/78684 having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys H01L29/7869 takes precedence
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A device may include a nanosheet field effect transistor (FET) that may include a substrate, a well that is doped with impurities at a surface of the substrate, a channel including a plurality of stacked nanosheets, a gate, a conductive material, and an isolation layer. Ones of the plurality of stacked nanosheets may include a semiconductor material that may be doped with impurities of the same conductivity type as the impurities of the well. The conductive material may be adjacent the plurality of nanosheets and may electrically connect ones of the plurality of nanosheets to the well. The isolation layer may electrically insulate the well from the workfunction metal.

Claims

1. A device comprising a nanosheet field effect transistor (FET), the nanosheet FET comprising:

a well that is doped with impurities at a surface of a substrate;

a channel comprising a plurality of stacked nanosheets on the well, ones of the plurality of stacked nanosheets comprising a semiconductor material that is doped with impurities of a same conductivity type as the impurities of the well and ones of the plurality of stacked nanosheets spaced apart from each other in a direction that is perpendicular to the surface of the substrate;

a gate comprising a workfunction metal on the plurality of nanosheets, between adjacent ones of the plurality of nanosheets, and between the plurality of nanosheets and the well;

a conductive material adjacent the plurality of nanosheets and that electrically connects ones of the plurality of nanosheets to the well;

an isolation layer on the well that electrically insulates the well from the workfunction metal.

2. The device of claim 1, wherein the conductive material comprises a semiconductor material that is doped with impurities of the same conductivity type as the impurities of the well.

3. The device of claim 2, wherein the conductive material comprises the same semiconductor material as the plurality of nanosheets.

4. The device of claim 2,

wherein an impurity concentration of the conductive material is greater than an impurity concentration of ones of the plurality of nanosheets, and

wherein an impurity concentration of the well is greater than the impurity concentration of the ones of the plurality of nanosheets.

5. The device of claim 2,

wherein the impurities of the well, the impurities of the nanosheets, and the impurities of the conductive material are p-type impurities,

wherein ones of the plurality of nanosheets comprise a group IV semiconductor material comprising germanium at a first mole fraction, and

wherein the conductive material comprises a group IV semiconductor material comprising germanium at a second mole fraction that is greater than the first mole fraction.

6. The device of claim 2,

wherein the impurities of the well, the impurities of the nanosheets, and the impurities of the conductive material are n-type impurities,

wherein ones of the plurality of nanosheets comprise a group III-V semiconductor material comprising indium at a first mole fraction, and

wherein the conductive material comprises a group III-V semiconductor material comprising indium at a second mole fraction that is less than the first mole fraction.

7. The device of claim 1, wherein the isolation layer comprises a wide bandgap semiconductor material.

8. The device of claim 1, wherein the nanosheet FET comprises a leakage current of less than about 1 nA/μ

m.

9. The device of claim 1, wherein ones of the plurality of nanosheets comprise a thickness in the direction that is perpendicular to the surface of the substrate and a width in a direction that is parallel to the surface of the substrate, wherein the width is at least twice the thickness.

10. The device of claim 1, wherein the nanosheet FET further comprises a plurality of internal spacers on respective ones of the plurality of nanosheets and that electrically insulates the conductive material from the workfunction metal.

11. A device comprising a nanosheet field effect transistor (FET), the nanosheet FET comprising:

a substrate comprising a well that is doped with impurities at a surface of the substrate;

a first channel stack comprising a first plurality of nanosheets on the well, ones of the first plurality of stacked nanosheets comprising a semiconductor material that is doped with impurities of a same conductivity type as the impurities of the well and ones of the first plurality of stacked nanosheets spaced apart from each other in a first direction that is perpendicular to the surface of the substrate;

a second channel stack comprising a second plurality of nanosheets on the well, ones of the second plurality of stacked nanosheets comprising a semiconductor material that is doped with impurities of the same conductivity type as the impurities of the well and ones of the second plurality of stacked nanosheets spaced apart from each other in the first direction that is perpendicular to the surface of the substrate and spaced apart from respective ones of the first plurality of nanosheets in a second direction that is parallel to the surface of the substrate;

a gate comprising a workfunction metal on the first plurality of nanosheets, between adjacent ones of the first plurality of nanosheets, between the first plurality of nanosheets and the well, on the second plurality of nanosheets, between adjacent ones of the second plurality of nanosheets, and between the second plurality of nanosheets and the well;

a plurality of internal spacers on respective ones of the first and second pluralities of nanosheets and that electrically insulates the conductive material from the workfunction metal;

a conductive material between the first and second pluralities of nanosheets and electrically connects ones of the first and second pluralities of nanosheets to the well; and

an isolation layer on the well that electrically insulates the well from the workfunction metal.

12. The device of claim 11, wherein the conductive material comprises a semiconductor material that is doped with impurities of the same conductivity type as the impurities of the well.

13. The device of claim 12, wherein the conductive material comprises the same semiconductor material as the plurality of nanosheets.

14. The device of claim 12,

wherein an impurity concentration of the conductive material is greater than an impurity concentration of ones of the plurality of nanosheets, and

wherein an impurity concentration of the well is greater than the impurity concentration of the ones of the plurality of nanosheets.

15. The device of claim 12,

wherein the impurities of the well, the impurities of the nanosheets, and the impurities of the conductive material are p-type impurities,

wherein ones of the plurality of nanosheets comprise a group IV semiconductor material comprising germanium at a first mole fraction, and

wherein the conductive material comprises a group IV semiconductor material comprising germanium at a second mole fraction that is greater than the first mole fraction.

16. The device of claim 12,

wherein the impurities of the well, the impurities of the nanosheets, and the impurities of the conductive material are n-type impurities,

wherein ones of the plurality of nanosheets comprise a group III-V semiconductor material comprising indium at a first mole fraction, and

wherein the conductive material comprises a group III-V semiconductor material comprising indium at a second mole fraction that is less than the first mole fraction.

17. The device of claim 11, wherein the isolation layer comprises a wide bandgap semiconductor material.

18. The device of claim 11, comprising a leakage current of less than about 1 nA/μ

m.

19. The device of claim 11, wherein ones of the first plurality of nanosheets and ones of the second plurality of nanosheets comprise a thickness in the first direction that is perpendicular to the surface of the substrate and a width in a direction that is parallel to the surface of the substrate, wherein the width is at least twice the thickness.

20. The device of claim 11, wherein the nanosheet FET further comprises a plurality of internal spacers on respective ones of the first and second pluralities of nanosheets and that electrically insulates the conductive material from the workfunction metal.

21-23. -23. (canceled)