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Amplifier Dynamic Bias Adjustment for Envelope Tracking

  • US 20160164468A1
  • Filed: 02/10/2016
  • Published: 06/09/2016
  • Est. Priority Date: 12/28/2012
  • Status: Active Grant
First Claim
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1. A circuital arrangement comprising:

  • an amplifier comprising;

    stacked transistors having a plurality of gate terminals configured to operatively provide a plurality of dynamic bias voltages or currents to the stacked transistors;

    an input port operatively connected to a gate terminal of an input transistor of the stacked transistors;

    an output port operatively connected to an output transistor of the stacked transistors configured to output an amplified version of the RF signal;

    a reference terminal operatively coupling the input transistor to a reference potential, anda plurality of resistors configured as a voltage divider coupled to the stacked transistors, wherein;

    the stacked transistors comprise two subsets of transistors operatively arranged in series;

    a) a first subset comprising the input transistor operatively connected between the reference potential at the reference terminal; and

    b) a second subset comprising one or more transistors operatively connected in series with each other, at least one transistor of the one or more transistors being the output transistor, the second subset operatively connected between the first subset and a variable output supply bias voltage or current provided to a drain terminal of the output transistor, andnodes of the plurality of resistors are configured to provide the dynamic bias voltages or currents to the gate terminals of the one or more transistors of the second subset.

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