PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF

• US 20160172264A1
• Filed: 02/26/2015
• Published: 06/16/2016
• Est. Priority Date: 12/10/2014
• Status: Active Grant

• Current Assignee: Siliconware Precision Industries Co., Ltd. (ASE Technology Holding Co., Ltd.)
• Original Assignee: Siliconware Precision Industries Co., Ltd. (ASE Technology Holding Co., Ltd.)
• Inventors: Teng, Wen-Yu, Hung, Liang-Yi
• Granted Patent: US 9,542,598 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 2218/10 by analysing the shape of a waveform, e.g. extracting parameters relating to peaks
• CPC Class Codes: G06V 40/1306 non-optical, e.g. ultrasonic or capacitive sensing
• CPC Class Codes: G06V 40/1318 using electro-optical elements or layers, e.g. electroluminescent sensing
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/566 Release layers for moulds, e.g. release layers, layers against residue during moulding
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/16245 the item being metallic
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83 using a layer connector
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/295 : containing a filler H01L23/296 takes precedence
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/1815 : Shape
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

A method for fabricating a package structure is provided, including the steps of: disposing and electrically connecting a sensing chip to a substrate; forming an encapsulant on the substrate to encapsulate the sensing chip; and forming a bright layer on the encapsulant to increase the gloss of the package structure. The encapsulant includes an additive to increase the Mohs hardness of the encapsulant. Further, the encapsulant with different additives presents different colors. Therefore, the invention obtains a high-gloss, high-hardness and colorful sensor package structure.

Claims

1. A method for fabricating a package structure, comprising the steps of:

disposing at least an electronic element on a substrate and electrically connecting the electronic element and the substrate;

forming an encapsulant on the substrate to encapsulate the electronic element; and

forming a bright layer on the encapsulant.

2. The method of claim 1, wherein the electronic element is a fingerprint sensing chip.

3. The method of claim 1, wherein the electronic element has a sensing surface with a sensing area completely covered by the encapsulant and a non-sensing surface opposite to the sensing surface and bonded to the substrate.

4. The method of claim 1, wherein the substrate is a lead frame or a circuit board.

5. The method of claim 1, wherein the electronic element is electrically connected to the substrate through wire bonding or in a flip-chip manner.

6. The method of claim 1, wherein forming the encapsulant comprises:

receiving the substrate having the electronic element disposed thereon in a mold having an upper mold and a lower mold, wherein a release film is formed on an inner surface of the upper mold; and

performing a molding process to form the encapsulant encapsulating the electronic element.

7. The method of claim 1, wherein the encapsulant has a surface roughness less than 0.1 um.

8. The method of claim 1, wherein the encapsulant comprises a polymer and an additive that is selected from ceramic fillers.

9. The method of claim 8, wherein the encapsulant with different additives presents different colors.

10. The method of claim 1, wherein the encapsulant has a Mohs hardness greater than 6.

11. The method of claim 1, wherein the bright layer is formed on the encapsulant by spray or spin coating.

12. The method of claim 1, wherein the bright layer has a gloss of 50 to 60 GU.

13. The method of claim 1, wherein a plurality of electronic elements are disposed on the substrate, and the method further comprises performing a singulation process.

14. The method of claim 1, further comprising forming a plurality of solder balls on a surface of the substrate opposite to the surface having the electronic element thereon.

15. A package structure, comprising:

a substrate;

at least an electronic element disposed on and electrically connected to the substrate;

an encapsulant formed on the substrate to encapsulate the electronic element; and

a bright layer formed on the encapsulant.

16. The structure of claim 15, wherein the electronic element is a fingerprint sensing chip.

17. The structure of claim 15, wherein the electronic element has a sensing surface with a sensing area completely covered by the encapsulant and a non-sensing surface opposite to the sensing surface and bonded to the substrate.

18. The structure of claim 15, wherein the substrate is a lead frame or a circuit board.

19. The structure of claim 15, wherein the electronic element is electrically connected to the substrate through wire bonding or in a flip-chip manner.

20. The structure of claim 15, wherein the encapsulant has a surface roughness less than 0.1 um.

21. The structure of claim 15, wherein the encapsulant comprises a polymer and an additive.

22. The structure of claim 21, wherein the additive is selected from ceramic fillers and the encapsulant has a Mohs hardness greater than 6.

23. The structure of claim 15, wherein the bright layer has a gloss of 50 to 60 GU.