MICRO LED WITH DIELECTRIC SIDE MIRROR

• US 20160181476A1
• Filed: 07/20/2015
• Published: 06/23/2016
• Est. Priority Date: 12/17/2014
• Status: Abandoned Application

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Huang, Chien-Hsing, Chang, Kevin K. C., Hu, Hsin-Hua, Chan, Clayton Ka Tsun
• Application Number:
  US14/803,991
• Publication Number:
  US 20160181476A1
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 24/83 using a layer connector
• CPC Class Codes: H01L 24/95 at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/46 Reflective coating, e.g. dielectric Bragg reflector
• CPC Class Codes: H01L 33/483 Containers
• CPC Class Codes: H01L 33/60 Reflective elements
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

LEDs and an electronic device are disclosed. In an embodiment an LED includes a p-n diode and a dielectric mirror spanning along a lateral sidewall of the p-n diode and directly underneath the p-n diode. An opening is formed in the dielectric mirror directly underneath the p-n diode, and a bottom conductive contact is on the dielectric mirror directly underneath the p-n diode and within the opening in the dielectric mirror.

Claims

1. An LED comprising:

a p-n diode including;

a p-doped layer;

an n-doped layer; and

a quantum well layer between the n-doped layer and the p-doped layer;

a dielectric mirror spanning along a lateral sidewall of the p-n diode and directly underneath the p-n diode;

an opening in the dielectric mirror directly underneath the p-n diode; and

a bottom conductive contact on the dielectric mirror directly underneath the p-n diode and within the opening in the dielectric mirror.

2. The LED of claim 1, wherein the bottom conductive contact comprises a recessed center area.

3. The LED of claim 2, wherein the opening in the dielectric mirror directly underneath the p-n diode includes tapered sidewalls.

4. The LED of claim 2, wherein the dielectric mirror comprises a pair of dielectric layers including a first dielectric layer with a first refractive index, and a second dielectric layer with a second refractive index.

5. The LED of claim 4, wherein the first refractive index is lower than the second refractive index, and the second dielectric layer is laterally outside of the first dielectric layer.

6. The LED of claim 5, wherein the dielectric mirror comprises multiple pairs of the first and second dielectric layers.

7. The LED of claim 5, wherein a difference between the first refractive index and the second refractive index is at least 0.4.

8. The LED of claim 5, wherein the first dielectric layer and the second dielectric layer have approximately a same thickness.

9. The LED of claim 5, wherein:

the first dielectric layer comprises a material selected from the group consisting of Al₂O₃, MgF₂, MgO, and CaF₂; and

the second dielectric layer comprises a material selected from the group consisting of AlN, ZnO, ZnS, ZrO₂, and GaN.

10. The LED of claim 5, wherein the first dielectric layer is characterized by a larger band gap, than materials forming the p-n diode.

11. An electronic device comprising:

a display substrate;

a plurality of vertical LEDs bonded to a corresponding plurality of driver contacts in a display region of the display substrate;

wherein each vertical LED comprises;

a p-n diode including;

a p-doped layer;

an n-doped layer; and

a quantum well layer between the n-doped layer and the p-doped layer;

a dielectric mirror spanning along a lateral sidewall of the p-n diode and directly underneath the p-n diode;

an opening in the dielectric mirror directly underneath the p-n diode; and

a bottom conductive contact on the dielectric mirror directly underneath the p-n diode and within the opening in the dielectric mirror.

12. The electronic device of claim 11, wherein each opening includes tapered sidewalls.

13. The electronic device of claim 12, wherein each bottom conductive contact comprises a recessed center area.

14. The electronic device of claim 13, wherein each bottom conductive contact comprises a multiple layer stack including a bottom-most layer comprising a noble metal.

15. The electronic device of claim 14, further comprising a plurality of solder bonds connecting the plurality of vertical LEDs to the corresponding plurality of driver contacts.

16. The electronic device of claim 15, wherein each solder bond is pooled within a recessed center area of a corresponding vertical LED.

17. The electronic device of claim 16, wherein each solder bond is diffused with the bottom-most layer of a corresponding vertical LED.

18. The electronic device of claim 16, further comprising an insulating layer surrounding each p-n diode;

and

a top electrode layer spanning over the insulating layer surrounding each p-n diode, the top electrode layer spanning over and in electrical contact with each vertical LED.

19. The electronic device of claim 18, wherein the insulating layer comprises a plurality of laterally separate portions of the insulating layer, each laterally separate portion corresponding a vertical LED.

20. The electronic device of claim 11, further comprising a transparent protective cover plate secured over the display region of the display substrate, wherein a polarizer film is not located between the transparent protective cover plate and the display substrate, and the transparent protective cover plate is exposed to ambient atmosphere.