IN-CELL TOUCH PANEL AND DISPLAY DEVICE

• US 20160188031A1
• Filed: 08/15/2014
• Published: 06/30/2016
• Est. Priority Date: 03/12/2014
• Status: Active Grant

• Current Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.), BOE Technology Group Co., Ltd.
• Original Assignee: Beijing BOE Optoelectronics Technology Co Ltd. (BOE Technology Group Co., Ltd.), BOE Technology Group Co., Ltd.
• Inventors: WANG, Haisheng, DONG, Xue, LIU, Yingming, DING, Xiaoliang, YANG, Shengji, ZHAO, Weijie, LIU, Hongjuan, REN, Tao, WANG, Chunlei
• Granted Patent: US 9,830,028 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/04164 Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/0443 using a single layer of sensing electrodes

Abstract

An in-cell touch panel and a display device are disclosed. The touch panel comprises: an upper substrate (01) and a lower substrate (02) that are disposed opposite to each other, with a planarization layer (09) and a spacer layer (10), which is disposed on the planarization layer (09), provided at a side, facing the lower substrate (02), of the upper substrate (01); and a plurality of self-capacitive electrodes (04) disposed in a same layer, insulated from each other and arranged between the planarization layer (09) and the spacer layer (10). In the touch panel, the self-capacitive electrodes (04) are arranged between the planarization layer (09) and the spacer layer (10) of the upper substrate (01), and thus patterning process for the planarization layer (09) can be omitted so as to reduce the manufacturing processes.

Claims

1. An in-cell touch panel, comprising:

an upper substrate and a lower substrate that are disposed opposite to each other, wherein a planarization layer and a spacer layer disposed on the planarization layer are provided at a side, facing the lower substrate, of the upper substrate; and

a plurality of self-capacitive electrodes, disposed in a same layer, insulated from each other and arranged between the planarization layer and the spacer layer.

2. The in-cell touch panel claimed as claim 1, further comprising:

a black matrix layer disposed between the upper substrate and the lower substrate wherein an orthographic projection of a pattern of each of the self-capacitive electrodes on the lower substrate lies within a region corresponding to a pattern of the black matrix layer.

3. The in-cell touch panel claimed as claim 2, wherein the orthographic projection of the pattern of each of the self-capacitive electrodes on the lower substrate is of a mesh structure disposed within the region corresponding to the pattern of the black matrix layer.

4. The in-cell touch panel claimed as claim 2, further comprising:

conductive wires corresponding to the self-capacitive electrodes in a one-to-one manner, and conduction nodes corresponding to the self-capacitive electrodes in a one-to-one manner;

wherein an orthographic projection of each of the conductive wires on the lower substrate lies within the region corresponding to the pattern of the black matrix layer, and each of the conduction nodes is arranged in a region where a sealant of the in-cell touch panel is provided.

5. The in-cell touch panel claimed as claim 4, further comprising:

a touch detection chip configured for judging a touch location, wherein each of the self-capacitive electrodes is connected to a connection terminal of the touch detection chip through a leading wire situated in the region where the sealant is provided, after the self-capacitive is connected to the conduction node through the conductive wire.

6. The in-cell touch panel claimed as claim 4, wherein the conductive wires and the self-capacitive electrodes are disposed in a same layer.

7. The in-cell touch panel claimed as claim 6, wherein the region where the sealant of the in-cell touch panel is provided comprises four sides, and the conduction nodes are distributed at all the four sides of the region where the sealant is provided.

8. The in-cell touch panel claimed as claim 7, wherein the conduction node, to which each of the self-capacitive electrodes corresponds, is distributed at a side, closest to the self-capacitive electrode, of the region where the sealant is provided.

9. The in-cell touch panel claimed as claim 4, wherein the conductive wires and the self-capacitive electrodes are disposed in different layers.

10. The in-cell touch pan&

claimed as claim 9, wherein the conductive wires are disposed between the upper substrate and the planarization layer, and each of the self-capacitive electrodes is electrically connected to the conductive wire, to which the self-capacitive corresponds, through a via hole.

11. The in-cell touch panel claimed as claim 1, wherein opposite sides, which respectively belong to two adjacent ones of the self-capacitive electrodes, each comprise a zigzag line.

12. The in-cell touch panel claimed as claim 11, wherein the opposite sides, which respectively belong to the two adjacent ones of the self-capacitive electrodes and respectively comprise the zigzag line, each comprise a stepped structure, and two stepped structures of the opposite sides are uniform in shape and match with each other;

and/or,

the opposite sides, which respectively belong to the two adjacent ones of the self-capacitive electrodes and respectively comprise the zigzag line, each comprise a concave-convex structure, and two concave-convex structures of the opposite sides are uniform in shape and match with each other.

14. The in-cell touch panel claimed as claim 3, further comprising:

conductive wires corresponding to the self-capacitive electrodes in a one-to-one manner, and conduction nodes corresponding to the self-capacitive electrodes in a one-to-one manner;

wherein an orthographic projection of each of the conductive wires on the lower substrate lies within the region corresponding to the pattern of the black matrix layer, and each of the conduction nodes is arranged in a region where a sealant of the in-cell touch panel is provided.

15. The in-cell touch panel claimed as claim 14, further comprising:

a touch detection chip configured for judging a touch location, wherein each of the self-capacitive electrodes is connected to a connection terminal of the touch detection chip through a leading wire situated hi the region where the sealant is provided, after the self-capacitive is connected to the conduction node through the conductive wire.

16. The in-cell touch panel claimed as claim 5, wherein the conductive wires and the self-capacitive electrodes are disposed hi a same layer.

17. The in-cell touch panel claimed as claim 15, wherein the conductive wires and the self-capacitive electrodes are disposed in a same layer.

18. The in-cell touch panel claimed as claim 16, wherein the region where the sealant of the in-cell touch panel is provided comprises four sides, and the conduction nodes are distributed at all the four sides of the region where the sealant is provided.

19. The in-cell touch panel claimed as claim 17, wherein the region where the sealant of the in-cell touch panel is provided comprises four sides, and the conduction nodes are distributed at all the four sides of the region where the sealant is provided.

20. The in-cell touch panel claimed as claim 5, wherein the conductive wires and the self-capacitive electrodes are disposed in different layers.

13. A display device, comprising an in-cell touch panel, wherein the in-cell touch panel comprises:

an upper substrate and a lower substrate that are disposed opposite to each other, wherein a planarization layer and a spacer layer disposed on the planarization layer are provided at a side, facing the lower substrate, of the upper substrate; and

a plurality of self-capacitive electrodes, disposed in a same layer, insulated from each other and arranged between the planarization layer and the spacer layer.