DATA SEGREGATION IN A STORAGE DEVICE

• US 20160188226A1
• Filed: 11/09/2015
• Published: 06/30/2016
• Est. Priority Date: 04/22/2010
• Status: Active Grant

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Inventors: Haines, Jonathan W., Feldman, Timothy R., Vinson, Wayne H., Goss, Ryan J., Gomez, Kevin, Gaertner, Mark Allen
• Granted Patent: US 10,452,281 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1036 Life time enhancement
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G06F 3/0616 in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0629 Configuration or reconfiguration of storage systems
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

An example method includes providing at least two data storage areas in a memory, providing a first amount of over-provisioning for a first of the at least two data storage areas and a second amount of over-provisioning for a second of the at least two data storage areas, categorizing data based on a characteristic of the data, and storing the data in one of the at least two data storage areas based on the categorization.

Claims

1. A device comprising:

nonvolatile solid state memory;

a controller coupled to the nonvolatile solid state memory, the controller configured to;

implement a first state of the nonvolatile solid state memory by;

allocating a first portion of the nonvolatile solid state memory as a first data storage area;

allocating a second portion of the nonvolatile solid state memory as a second data storage area;

allocating a third portion of the nonvolatile memory as overprovisioning reserved for the first portion;

allocating a fourth portion of the nonvolatile memory as overprovisioning reserved for the second portion; and

adaptively adjusting, during operation of the device, an amount of overprovisioning of the third portion and an amount of overprovisioning of the fourth portion.

2. The device of claim 1 further comprising adaptively adjusting includes:

implementing a second state of the nonvolatile solid state memory by;

increasing an amount of data storage space allocated for the third portion; and

decreasing an amount of data storage space allocated for the fourth portion.

3. The device of claim 2 further comprising a total data storage space of the third portion plus the fourth portion in the second state is equal to a total data storage space of the third portion plus the fourth portion in the first state.

4. The device of claim 1 further comprising the controller configured to store data that has a higher frequency of write access in the first data storage area, and store data that has a lower frequency of write access in the second data storage area.

5. The device of claim 1 further comprising the controller configured to categorize data based on a characteristic of the data and then store the data in one of the first data storage area and the second data storage area based on the categorization.

6. The device of claim 5 further comprising the characteristic is a frequency of write access of the data.

7. The device of claim 1 further comprising the controller configured to adjust the amount of the third portion or the fourth portion in response to a garbage collection operation where valid data is moved from an erasure block of the nonvolatile solid state memory to free the erasure block for storing other data.

8. The device of claim 1 further comprising the controller configured to adaptively adjust the overprovisioning based on an estimated probability density function of a workload of the nonvolatile solid state memory.

9. The device of claim 1 further comprising the first data storage area and the second data storage area each include a plurality of erasure blocks.

10. The device of claim 9 further comprising the controller configured to allocate a first amount of overprovisioning to the third portion based on a number of erasure blocks in the first portion, and allocate a second amount of overprovisioning to the fourth portion based on a number of erasure blocks in the second portion.

11. A memory device including instructions, that when executed by a processing element, cause the processing element to perform a method comprising:

implement a first amount of overprovisioning for a first portion of a nonvolatile solid state memory and a second amount of overprovisioning for a second portion of a nonvolatile solid state memory; and

dynamically adjusting, during operation of the memory device, the first amount and the second amount based on a total amount of overprovisioning for the nonvolatile solid state memory.

12. The memory device of claim 11 further including instructions, that when executed by a processing element, cause the processing element to allocate the first amount of overprovisioning based on a number of erasure blocks in the first portion, and allocate the second amount of overprovisioning based on a number of erasure blocks in the second portion.

13. The memory device of claim 11 further including instructions, that when executed by a processing element, cause the processing element to dynamically adjust a number of erasure blocks in the first portion and dynamically adjust the first amount of overprovisioning based on the number of erasure blocks in the first portion.

14. The device of claim 11 further including instructions, that when executed by a processing element, cause the processing element to dynamically adjust the first amount based on a likelihood of a specific physical location of the nonvolatile solid state memory will be selected for storing data by a host computer.

15. The device of claim 11 further including instructions, that when executed by a processing element, cause the processing element to:

determine a frequency of write access of write data;

store the write data in the first portion when the write data has a higher frequency of write access than other data;

store the write data in the second portion when the write data has a lower frequency of write access than other data; and

where the first amount of overprovisioning is greater than the second amount of overprovisioning.

16. A device comprising:

a controller configured to manage a solid state drive (SSD) and to;

implement a first state of the SSD having;

a first portion of the SSD for storing write data;

a second portion of the SSD for storing write data;

a third portion of the SSD for overprovisioning reserved for the first portion;

a fourth portion of the SSD for overprovisioning reserved for the second portion and

selectively storing data to the first portion and the second portion during operation of the device.

17. The device of claim 16 further comprising the controller configured to:

implement a second state of the SSD having;

the first portion of the SSD for storing write data;

the second portion of the SSD for storing write data;

the third portion having an increased amount of data storage than in the first state;

the fourth portion having a decreased amount of data storage than in the first state; and

where the third portion has a greater amount of overprovisioning than the fourth portion and a total amount of overprovisioning in the .

18. The device of claim 17 further comprising the controller configured to:

determine a frequency of write access of received data;

store the received data in the first portion when the received data has a higher frequency of write access than other data; and

store the received data in the second portion when the received data has a lower frequency of write access than other data.

19. The device of claim 16 further comprising the controller configured to:

increase a number of erasure blocks in the first portion;

increase an amount of overprovisioning of the third portion based on the number of erasure blocks in the first portion; and

decrease an amount of overprovisioning of the fourth portion based on the amount of overprovisioning of the third portion.

20. The device of claim 16 further comprising the controller configured to dynamically adjust an amount of memory reserved for the third portion and an amount of memory reserved for the fourth portion based on:

a likelihood a specific physical location of the SSD will be selected for storing data by a host computer; and

a total amount of overprovisioning of the SSD.