COMPENSATOR FOR REMOVING NONLINEAR DISTORTION

• US 20160191020A1
• Filed: 09/03/2015
• Published: 06/30/2016
• Est. Priority Date: 04/30/2008
• Status: Active Grant

• Current Assignee: Linearity LLC
• Original Assignee: Digital Innovations
• Inventors: Velazquez, Scott R.
• Granted Patent: US 9,705,477 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H03F 1/3241 using predistortion circuits H03F1/3211, H03F1/3217 take precedence
• CPC Class Codes: H03F 1/3247 using feedback acting on predistortion circuits H03F1/3264 takes precedence
• CPC Class Codes: H03H 21/0067 Means or methods for compensation of undesirable effects
• CPC Class Codes: H03M 1/0612 over the full range of the converter, e.g. for correcting differential non-linearity
• CPC Class Codes: H03M 1/12 Analogue/digital converters H03M1/001 – H03M1/10 take precedence
• CPC Class Codes: H03M 1/66 Digital/analogue converters H03M1/001 – H03M1/10 take precedence
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 2001/0425 with linearisation using predistortion
• CPC Class Codes: H04B 2001/0441 with linearisation using feed-forward
• CPC Class Codes: H04L 25/02 Details ; arrangements for supplying electrical power along data transmission lines systems for transmitting signals via power distribution lines H04B3/54
• CPC Class Codes: H04L 25/14 Channel dividing arrangements , i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
• CPC Class Codes: H04L 27/0006 Assessment of spectral gaps suitable for allocating digitally modulated signals, e.g. for carrier allocation in cognitive radio for spectrum sharing between different networks H04W16/14
• CPC Class Codes: H04L 27/0012 arrangements for identifying the type of modulation

Abstract

The present invention is a computationally-efficient compensator for removing nonlinear distortion. The compensator operates in a digital post-compensation configuration for linearization of devices or systems such as analog-to-digital converters and RF receiver electronics. The compensator also operates in a digital pre-compensation configuration for linearization of devices or systems such as digital-to-analog converters, RF power amplifiers, and RF transmitter electronics. The compensator effectively removes nonlinear distortion in these systems in a computationally efficient hardware or software implementation by using one or more factored multi-rate Volterra filters. Volterra filters are efficiently factored into parallel FIR filters and only the filters with energy above a prescribed threshold are actually implemented, which significantly reduces the complexity while still providing accurate results. For extremely wideband applications, the multi-rate Volterra filters are implemented in a demultiplexed polyphase configuration which performs the filtering in parallel at a significantly reduced data rate. The compensator is calibrated with an algorithm that iteratively subtracts an error signal to converge to an effective compensation signal. The algorithm is repeated for a multiplicity of calibration signals, and the results are used with harmonic probing to accurately estimate the Volterra filter kernels. The compensator improves linearization processing performance while significantly reducing the computational complexity compared to a traditional nonlinear compensator.

Claims

1. A multi-rate Volterra compensator for removing nonlinear distortion introduced by an electronic system, the multi-rate Volterra compensator comprising:

a number, k, of processing arms, wherein k is equal to a maximum order of the multi-rate Volterra compensator and is greater than one;

for each kth order processing arm,

an upsampler for increasing the sampling rate of the multi-rate Volterra compensator'"'"'s input by a factor of M_k, wherein the increased sample rate is commensurate with a bandwidth of the nonlinear distortion;

a first bandpass filter coupled to an output of the upsampler, and

an upsampled Volterra filter coupled to an output of the first bandpass filter.

2. The multi-rate Volterra compensator of claim 1, wherein each kth order processing arm further comprises

a second bandpass filter coupled to an output of the upsampled Volterra filter, and

a downsampler for decreasing the increased sample rate to a sample rate of the multi-rate Volterra compensator'"'"'s input.

3. The multi-rate Volterra compensator of claim 2, wherein for each kth order processing arm, the downsampler and first bandpass filter are implemented as a first parallel polyphase bandpass filter, and the upsampled Volterra filter is implemented as a parallel downsampled Volterra filter.

4. The multi-rate Volterra compensator of claim 3, wherein for each kth order processing arm, the second bandpass filter and upsampler are implemented as a second parallel polyphase bandpass filter.

5. The multi-rate Volterra compensator of claim 4, wherein for each kth order processing arm, the first parallel polyphase bandpass filter, the parallel downsampled Volterra filter, and the second parallel polyphase bandpass filter are implemented as an equivalent Volterra filter, wherein the equivalent Volterra filter is a multidimensional convolution of a tensor outer product of the first parallel polyphase bandpass filter, the parallel downsampled Volterra filter, and a multidimensional diagonal matrix containing coefficients of the second parallel polyphase bandpass filter.

6. The multi-rate Volterra compensator of claim 2, wherein for each kth order processing arm, the upsampler, first bandpass filter, upsampled Volterra filter, second bandpass filter, and downsampler are implemented as a multidimensional bandpass filter convolved with the downsampled Volterra filter.

7. An oversampled Volterra compensator for removing nonlinear distortion introduced by an electronic system, the oversampled Volterra compensator comprising:

a number, k, of processing arms, wherein k is equal to a maximum order of the multi-rate Volterra compensator and is greater than one;

for each kth order processing arm, an upsampled Volterra filter operating on a bandlimited subband that is a portion of a full Nyquist bandwidth of the electronic system.

8. The oversampled Volterra compensator of claim 7, wherein each kth order processing arm further comprises:

a bandpass filter coupled to the output of the upsampled Volterra filter, and

a downsampler coupled to the output of the bandpass filter.

9. The oversampled Volterra compensator of claim 7, wherein each kth order processing arm further comprises an analog bandpass filter coupled to the output of the upsampled Volterra filter.

10. A Volterra compensator for removing nonlinear distortion introduced by an electronic system, the Volterra compensator comprising:

a Volterra kernel of order N, wherein N is equal to or greater than two, wherein the Volterra kernel is implemented in a processor comprising;

a plurality of exponentiators operating on delayed inputs, and

a plurality of parallel FIR filters.

11. The Volterra compensator of claim 10, wherein the plurality of exponentiators are second-order exponentiators.

12. The Volterra compensator of claim 10, wherein the plurality of exponentiators are third-order exponentiators.

13. The Volterra compensator of claim 10, wherein the plurality of exponentiators are fourth or higher-order exponentiators.

14. The Volterra compensator of claim 10, wherein only a subset of the plurality of parallel FIR filters with energy above a prescribed threshold are implemented.

15. The Volterra compensator of claim 10, wherein the plurality of parallel FIR filters is implemented in a polyphase configuration.

16. A method of determining a pre-distorted signal for an electronic device, the method comprising the steps of:

(i) transmitting a transmit signal to the electronic device, wherein the electronic device processes the transmit signal into an output signal;

(ii) receiving the output signal from the electronic device;

(iii) subtracting the output signal from a reference signal to form an error signal;

(iv) adding the error signal to the reference signal to form a pre-distorted signal;

repeating steps (i), (ii), (iii), and (iv) with the pre-distorted signal as the transmit signal until the error signal falls below a predetermined threshold;

storing the final pre-distorted signal.

17. The method of claim 16, wherein the reference signal comprises multiple desired signals.

18. The method of claim 16, wherein the step of (i) transmitting a transmit signal to the electronic device comprises:

compensating for amplitude and phase distortion caused by a digital-to-analog converter and transmit electronics to form a compensated transmit signal;

converting, via the digital-to-analog converter, the compensated transmit signal from a digital signal to an analog signal; and

transmitting, via the transmit electronics, the analog signal to the electronic device.

19. The method of claim 16, wherein the step of (ii) receiving the output signal from the electronic device comprises:

receiving, via receive electronics, the output signal;

converting, via an analog-to-digital converter, the output signal from an analog signal to a digital signal; and

compensating for amplitude and phase distortion caused by the receive electronics and the analog-to-digital converter.

20. The method of claim 16, further comprising the step of limiting, via a bandpass filter, the bandwidth of the error signal.

21. An electronic apparatus comprising:

a source for generating a reference signal;

a summer, wherein the summer combines the reference signal with an error signal to form a pre-distorted signal;

transmit electronics for processing the pre-distorted signal;

a digital-to-analog converter to convert the pre-distorted signal into an analog signal,

a radio frequency device coupled to an output of the digital-to-analog converter, wherein the radio frequency device processes the analog signal into an output signal,

an analog-to-digital converter to convert the output signal into a digital received signal;

receive electronics for processing the digital received signal; and

a subtractor, wherein the subtractor subtracts the received signal from the reference signal to form the error signal.

22. The electronic apparatus of claim 21, further comprising a transmit equalization filter to compensate for amplitude and phase distortion caused by the transmit electronics and digital-to-analog converter.

23. The electronic apparatus of claim 21, further comprising a receive equalization filter to compensate for amplitude and phase distortion caused by the receive electronics and analog-to-digital converter.

24. The electronic apparatus of claim 21, further comprising a bandpass filter to limit the bandwidth of the error signal.