IMAGING DEVICE INCLUDING UNIT PIXEL CELL

• US 20160191825A1
• Filed: 12/01/2015
• Published: 06/30/2016
• Est. Priority Date: 12/26/2014
• Status: Active Grant

• Current Assignee: Panasonic Intellectual Property Management Co., Ltd. (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Intellectual Property Management Co., Ltd. (Panasonic Holdings Corporation)
• Inventors: SATO, YOSHIHIRO, HIRASE, JUNJI
• Granted Patent: US 10,212,372 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/14623 Optical shielding
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/14638 Structures specially adapted for transferring the charges across the imager perpendicular to the imaging plane
• CPC Class Codes: H01L 27/14665 Imagers using a photoconductor layer
• CPC Class Codes: H04N 25/63 applied to dark current
• CPC Class Codes: H04N 25/65 applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors

Abstract

An imaging device of the present disclosure includes: a unit pixel cell comprising a photoelectric converter converting incident light into signal charge, a semiconductor substrate, a charge storage region located in the semiconductor substrate and storing the signal charge, and a signal detection circuit detecting the signal charge; a feedback circuit negatively feeding back output of the signal detection circuit and comprising a signal line; and at least one wiring layer located between the semiconductor substrate and the photoelectric converter. The at least one wiring layer includes a portion of the signal line, the portion overlapping the unit pixel cell in a plan view. In the plan view, the portion is located on an opposite side from the charge storage region across a center line of the unit pixel cell, the center line being in parallel with a direction in which the signal line extends.

Claims

1. An imaging device comprising:

a unit pixel cell comprising

a photoelectric converter that converts incident light into signal charge,

a semiconductor substrate,

a charge storage region that is located in the semiconductor substrate and stores the signal charge, and

a signal detection circuit that detects the signal charge;

a feedback circuit that negatively feeds back output of the signal detection circuit and comprises a signal line; and

at least one wiring layer that is located between the semiconductor substrate and the photoelectric converter, the at least one wiring layer including a portion of the signal line, the portion of the signal line overlapping the unit pixel cell in a plan view,

wherein in the plan view, the portion of the signal line is located on an opposite side from the charge storage region across a center line of the unit pixel cell, the center line being in parallel with a direction in which the signal line extends.

3. The imaging device according to claim 1,

wherein the signal detection circuit comprises capacitors, and

in the plan view, the portion of the signal line overlaps with one of the capacitors, the one having the largest electrode area among the capacitors.

4. The imaging device according to claim 1,

wherein the photoelectric converter comprises a first electrode, a second electrode, and a photoelectric conversion film that is located between the first electrode and the second electrode, the first electrode being located on a light receiving side of the photoelectric conversion film,

the signal detection circuit comprises

an amplifier transistor a gate of which is electrically connected with the second electrode,

a reset transistor one of a source and a drain of which is electrically connected with the second electrode,

a first capacitor one of two electrodes of which is electrically connected with the second electrode, and

a second capacitor that has a larger capacitance value than the first capacitor does, and

the second capacitor comprises

a third electrode that is located between the semiconductor substrate and the second electrode,

a fourth electrode that is located more apart from the second electrode than the third electrode is, and

a first dielectric layer that is located between the third electrode and the fourth electrode.

6. The imaging device according to claim 4,

wherein in the plan view, the portion of the signal line overlaps with the second capacitor.

7. The imaging device according to claim 6,

wherein the fourth electrode comprises an impurity region that is located in the semiconductor substrate.

8. The imaging device according to claim 7,

wherein the signal detection circuit further comprises a third capacitor that comprises

a second dielectric layer that is located on the third electrode, and

a fifth electrode that is opposed to the third electrode via the second dielectric layer, and

the fourth electrode and the fifth electrode are electrically connected with a voltage source.

9. The imaging device according to claim 4,

wherein the signal line is electrically connected with the other of the source and the drain of the reset transistor.

10. The imaging device according to claim 4,

wherein the first capacitor is electrically connected between the source and the drain of the reset transistor.

11. The imaging device according to claim 4,

wherein the signal detection circuit further comprises a contact plug that is located between the gate of the amplifier transistor and the second electrode, physically contacts with the at least one wiring layer and the one of two electrodes of the first capacitor, and electrically connects the at least one wiring layer and the one of two electrodes of the first capacitor together, and

in a cross section of the unit pixel cell, the cross section being perpendicular to the direction and including the contact plug, the signal line is located above a region in the semiconductor substrate, the region being located on an opposite side from the charge storage region across the contact plug, the signal line being closer to the second electrode than the contact plug is.

12. The imaging device according to claim 1,

wherein the at least one wiring layer comprises wiring layers, and

one of the wiring layers other than a wiring layer located closest to the substrate among the wiring layers includes the portion of the signal line.

13. The imaging device according to claim 1,

wherein the at least one wiring layer includes a shield electrode located between the portion of the signal line and the semiconductor substrate, the shield electrode at least partially overlapping with the portion of the signal line in the plan view.

14. The imaging device according to claim 1,

wherein the feedback circuit comprises an inverting amplifier that amplifies the output of the signal detection circuit, and

the signal line is a feedback line that negatively feeds back output of the inverting amplifier.

2. An imaging device comprising:

a unit pixel cell comprising

a photoelectric converter that converts incident light into signal charge,

a semiconductor substrate,

a charge storage region that is located in the semiconductor substrate and stores the signal charge, and

a signal detection circuit that detects the signal charge, the signal detection circuit comprising an amplifier transistor and a feedback circuit that negatively feeds back output of the amplifier transistor; and

at least one wiring layer that is located between the semiconductor substrate and the photoelectric converter, the at least one wiring layer including a portion of a signal line that is electrically connected with the amplifier transistor and reads out output of the signal detection circuit, the portion of the signal line overlapping the unit pixel cell in a plan view,

wherein in the plan view, the portion of the signal line is located on an opposite side from the charge storage region across a center line of the unit pixel cell, the center line being in parallel with a direction in which the signal line extends.

5. The imaging device according to claim 2,

wherein the photoelectric converter comprises a first electrode, a second electrode, and a photoelectric conversion film that is located between the first electrode and the second electrode, the first electrode being located on a light receiving side of the photoelectric conversion film,

the signal detection circuit comprises

a reset transistor one of a source and a drain of which is electrically connected with the second electrode,

a first capacitor one of two electrodes of which is electrically connected with the second electrode, and

a second capacitor that has a larger capacitance value than the first capacitor does,

a gate of the amplifier transistor is electrically connected with the second electrode, and

the second capacitor comprises

a third electrode that is located between the semiconductor substrate and the second electrode,

a fourth electrode that is located more apart from the second electrode than the third electrode is, and

a first dielectric layer that is located between the third electrode and the fourth electrode.

15. The imaging device according to claim 2,

wherein the signal line is a vertical signal line.