INTEGRATED MAGNETIC FIELD SENSOR AND METHOD OF POWERING ON AND OFF A LOAD

• US 20160200245A1
• Filed: 01/12/2016
• Published: 07/14/2016
• Est. Priority Date: 01/14/2015
• Status: Active Grant

• Current Assignee: Allegro Microsystems Incorporated (Sanken Electric Company Limited)
• Original Assignee: Allegro Microsystems Incorporated (Sanken Electric Company Limited)
• Inventors: Shoemaker, Eric G., Rivas, Manuel, Monreal, Gerardo A., Graham, Christine M.
• Granted Patent: US 10,088,533 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: B60Q 3/20 for lighting specific fittings of passenger or driving compartments; mounted on specific fittings of passenger or driving compartments lighting for dashboards B60Q3/10
• CPC Class Codes: B60Q 3/30 for compartments other than passenger or driving compartments, e.g. luggage or engine compartments
• CPC Class Codes: B60Q 3/80 Circuits; Control arrangements for dashboards B60Q3/16; for mass transit vehicles B60Q3/47
• CPC Class Codes: G01R 33/007 Environmental aspects, e.g. temperature variations, radiation, stray fields G01R33/025 takes precedence
• CPC Class Codes: G01R 33/0082 Compensation, e.g. compensating for temperature changes
• CPC Class Codes: G01R 33/07 Hall effect devices
• CPC Class Codes: G01R 33/072 Constructional adaptation of the sensor to specific applications
• CPC Class Codes: G05F 3/08 wherein the variable is dc
• CPC Class Codes: H05B 45/18 using temperature feedback

Abstract

An integrated magnetic field sensor includes a magnetic field sensing circuit and a power driving circuit disposed upon or within a common substrate. A method of powering on and off a load uses the above integrated magnetic field sensor.

Claims

15-1. The method of claim 15, wherein the higher power state is operable to provide at least one hundred seventy milliamps of current, and wherein the magnetic field sensing circuit comprises a Hall effect element disposed upon the semiconductor substrate, and wherein the power driving circuit is disposed at a position upon the semiconductor substrate to result in a thermal gradient at a position of the Hall effect element smaller than one degree Celsius.