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POWER MANAGEMENT SYNCHRONIZATION MESSAGING SYSTEM

  • US 20160209897A1
  • Filed: 12/28/2015
  • Published: 07/21/2016
  • Est. Priority Date: 12/22/2010
  • Status: Active Grant
First Claim
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1. A multi-die package for a microprocessor comprising:

  • a plurality of dies;

    each die having a plurality of cores, including a single master core; and

    a plurality of sideband non-system-bus inter-die communication wires communicatively coupling the dies to each other for a purpose of synchronizing power management;

    wherein the master core of each die is configured to use one and only one of the inter-die communication wires to transmit power management synchronization messages to each of the other master cores;

    wherein the master core of each die is configured to receive power management synchronization messages from each of the other master cores via one or more inter-die communication wires.

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