Circuit Arrangement Having Charge Storage Units

• US 20160218524A1
• Filed: 01/25/2016
• Published: 07/28/2016
• Est. Priority Date: 01/26/2015
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Teigelkoetter, Johannes, Bayerer, Reinhold
• Granted Patent: US 10,374,439 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H02J 7/0013 acting upon several batteries simultaneously or sequentially H02J7/1423 takes precedence
• CPC Class Codes: H02J 7/345 using capacitors as storage or buffering devices
• CPC Class Codes: H02M 1/327 against abnormal temperatures
• CPC Class Codes: H02M 5/458 using semiconductor devices only
• CPC Class Codes: H02M 7/003 Constructional details, e.g. physical layout, assembly, wiring or busbar connections
• CPC Class Codes: H02M 7/06 using discharge tubes without control electrode or semiconductor devices without control electrode
• CPC Class Codes: H02M 7/5387 in a bridge configuration

Abstract

A circuit arrangement includes a power semiconductor circuit, a first charge storage unit and a second charge storage unit. The first charge storage unit has first and second terminals, the second charge storage unit has first and second terminals, and the power semiconductor circuit has first and second terminals. The power semiconductor circuit also has a first semiconductor component and a second semiconductor component, the load paths of which are electrically connected in series between the first and second terminals of the power semiconductor circuit. A first connection electrically connects the first terminal of the first charge storage unit to the first terminal of the second charge storage unit, and a second connection electrically connects the second terminal of the first charge storage unit to the second terminal of the second charge storage unit. A magnetic core is electromagnetically coupled to the first and/or second connections.

Claims

1. A circuit arrangement, comprising:

a power semiconductor circuit having a first terminal and a second terminal, and a first semiconductor component and a second semiconductor component having load paths which are electrically connected in series between the first terminal and the second terminal;

a first charge storage unit having a first terminal and a second terminal; and

a second charge storage unit having a first terminal and a second terminal;

a first connection electrically connecting the first terminal of the first charge storage unit to the first terminal of the second charge storage unit;

a second connection electrically connecting the second terminal of the first charge storage unit to the second terminal of the second charge storage unit; and

a magnetic core electromagnetically coupled to the first connection and/or the second connection.

2. The circuit arrangement of claim 1, wherein a distance between the magnetic core and the first connection is less than 5 mm.

3. The circuit arrangement of claim 1, wherein the magnetic core has a feed-through, through which the first connection and/or the second connection is fed through.

4. The circuit arrangement of claim 1, wherein the magnetic core or a section of the magnetic core is a closed ring through which the first connection and/or the second connection is fed through.

5. The circuit arrangement of claim 1, wherein the magnetic core or a continuous section of the magnetic core is a U-shaped core or as an E-shaped core.

6. The circuit arrangement of claim 1, wherein the first connection and/or the second connection has no complete turn surrounding the magnetic core.

7. The circuit arrangement of claim 1, wherein the magnetic core has a relative magnetic permeability of at least 500 at a temperature of 105°

C.

8. The circuit arrangement of claim 1, wherein the first charge storage unit comprises one capacitor or a plurality of capacitors electrically connected in parallel with one another.

9. The circuit arrangement of claim 1, wherein the magnetic core has an additional winding different than the first connection and/or the second connection.

10. The circuit arrangement of claim 9, wherein the additional winding has at least two turns, each of which is wound around the magnetic core.

11. The circuit arrangement of claim 9, wherein the additional winding is part of a closed current loop having a total electrical resistance of at least 0.3 Ohm.

12. The circuit arrangement of claim 9, wherein the additional winding is part of a closed current loop having N2 turns and a total electrical resistance R which satisfies one of the following criteria:

13. The circuit arrangement of claim 1, wherein the second charge storage unit comprises one capacitor or a plurality of capacitors electrically connected in parallel with one another.

14. The circuit arrangement of claim 13, wherein the second charge storage unit has a capacitance of at least 500 μ

F.

15. The circuit arrangement of claim 13, wherein a capacitance of the second charge storage unit is at least 10 times a capacitance of the first charge storage unit.

16. The circuit arrangement of claim 1, wherein the second charge storage unit comprises one rechargeable battery or a plurality of rechargeable batteries electrically connected in parallel with one another.

17. The circuit arrangement of claim 1, wherein:

the first connection has a leakage inductance LS1;

the second connection has a leakage inductance LS2; and

a total leakage inductance LS1+LS2 of the first and second connections is greater than 2.5 times the leakage inductance LS2 of the second charge storage unit.

18. The circuit arrangement of claim 1, further comprising:

a third connection electrically connecting the first terminal of the first charge storage unit to the first terminal of the power semiconductor circuit; and

a fourth connection electrically connecting the second terminal of the first charge storage unit to the second terminal of the power semiconductor circuit.

19. The circuit arrangement of claim 18, wherein:

the first connection has a leakage inductance LS1;

the second connection has a leakage inductance LS2;

the third connection has a leakage inductance LS3;

the fourth connection has a leakage inductance LS4; and

a ratio (LS3+LS4)/(LS1+LS2) between a total leakage inductance LS3+LS4 of the third and fourth connections and a total leakage inductance LS1+LS2 of the first and second connections is at least 2.5.

20. The circuit arrangement of claim 18, wherein:

the first connection has a leakage inductance LS1;

the second connection has a leakage inductance LS2;

the third connection has a leakage inductance LS3;

the fourth connection has a leakage inductance LS4; and

a total leakage inductance LS1+LS2 of the first and second connections is greater than 2.5 times the sum of LS3, LS4 and a leakage inductance of the second charge storage unit.