DISPLAY PANEL

• US 20160225312A1
• Filed: 08/21/2015
• Published: 08/04/2016
• Est. Priority Date: 02/02/2015
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: BYUN, Min Woo, NOH, Jae Du, LEE, Seung-Kyu
• Granted Patent: US 9,767,727 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/043 Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
• CPC Class Codes: G09G 2330/045 Protection against panel overheating
• CPC Class Codes: G09G 2330/12 Test circuits or failure detection circuits included in a display system, as permanent part thereof
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/3208 organic, e.g. using organic light-emitting diodes [OLED]

Abstract

A display panel including: pixels disposed in an active area of a substrate; data lines connected to the pixels; and a crack detection line disposed in a peripheral area of the active area in the substrate. The crack detection line includes a plurality of stacked conductive layers and at least one insulating layer disposed therebetween. At least one of the conductive layers is electrically connected to any one of the data lines.

Claims

1. A display panel, comprising:

pixels disposed in an active area of a substrate;

data lines connected to the pixels; and

a crack detection line disposed in a peripheral area of the active area in the substrate,

wherein the crack detection line comprises a plurality of stacked conductive layers and at least one insulating layer disposed therebetween, and

at least one of the conductive layers is electrically connected to any one of the data lines.

2. The display panel of claim 1, wherein:

the crack detection line comprises a first conductive layer, a second conductive layer stacked on the first conductive layer, a first insulating layer disposed therebetween, a third conductive layer stacked on the second conductive layer, and a second insulating layer disposed therebetween;

the first and second conductive layers are formed on the same layers as gate electrodes that are formed on different layers in a pixel circuit of the active area; and

the third conductive layer is formed on the same layer as source/drain electrodes in the pixel circuit.

3. The display panel of claim 2, wherein the first and third conductive layers are connected to each other through at least one contact hole.

4. The display panel of claim 3, wherein the first and third conductive layers are electrically connected to any one data line.

5. The display panel of claim 3, wherein the second conductive layer is electrically connected to any one data line.

6. The display panel of claim 2, wherein the second conductive layer and the third conductive layer are electrically connected to each other through a contact hole.

7. The display panel of claim 6, wherein the second and third conductive layers are electrically connected to any one data line.

8. The display panel of claim 2, wherein the first, second, and third conductive layers are connected to one another through a plurality of contact holes.

9. The display panel of claim 8, wherein the first, second, and third conductive layers are electrically connected to any one data line.

10. The display panel of claim 1, wherein the at least one conductive layer is electrically connected to any one data line through a switching element.