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SEMICONDUCTOR DEVICE

  • US 20160225453A1
  • Filed: 12/07/2015
  • Published: 08/04/2016
  • Est. Priority Date: 01/29/2015
  • Status: Active Grant
First Claim
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1. A semiconductor device comprising:

  • a memory array provided with electrically rewritable nonvolatile memory cells arranged in a matrix;

    a driver circuit operable to drive a plurality of word lines each corresponding to a row of the memory array; and

    a decode circuit operable to generate a plurality of selection signals to select each of the word lines based on a plurality of predecode signals, and operable to supply the generated selection signals to the driver circuit,wherein the decode circuit comprises;

    a plurality of first logic gates each operable to invert a logical level of the corresponding predecode signal according to an operation mode;

    a plurality of first level shifters each operable to convert one of the corresponding predecode signal and its inverted signal into a step-up signal of a voltage level according to the operation mode; and

    a plurality of first logic circuits operable to generate the selection signal by performing a logical operation of the corresponding step-up signals among the step-up signals respectively outputted from the first level shifters, andwherein each of the first logic circuits performs a different logical operation according to the operation mode.

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