Memory System and Method for Reducing Read Disturb Errors
First Claim
1. A method for reducing read disturb errors, the method comprising:
- performing the following in a memory system comprising a plurality of blocks of memory, wherein the blocks comprise level one, level two, and level three blocks;
detecting a read disturb error in a level one block;
moving data stored in the level one block to a level two block;
monitoring read accesses to the level two block to determine what data in the level two block is frequently read;
moving the data that was determined to be frequently read from the level two block to a level three block;
monitoring read accesses to the data in the level three block to determine if the data in the level three block is read less frequently; and
in response to determining that the data in the level three block is read less frequently, moving the data from the level three block to a level one block.
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Accused Products
Abstract
A memory system and method for reducing read disturb errors are disclosed. In one embodiment, a memory system is provided comprising a plurality of blocks of memory and a controller. The controller is configured to detect a read disturb error in a block, identify data that caused the read disturb error, and move the data that caused the read disturb error to a block with a higher read endurance. This can be done by assigning read counters to blocks to determine frequently-read data, and storing that data in a separate block until it is less frequently read and will likely not cause additional read disturb errors.
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Citations
36 Claims
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1. A method for reducing read disturb errors, the method comprising:
performing the following in a memory system comprising a plurality of blocks of memory, wherein the blocks comprise level one, level two, and level three blocks; detecting a read disturb error in a level one block; moving data stored in the level one block to a level two block; monitoring read accesses to the level two block to determine what data in the level two block is frequently read; moving the data that was determined to be frequently read from the level two block to a level three block; monitoring read accesses to the data in the level three block to determine if the data in the level three block is read less frequently; and in response to determining that the data in the level three block is read less frequently, moving the data from the level three block to a level one block. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A memory system comprising:
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a memory comprising a plurality of blocks; and a controller in communication with the memory, wherein the controller is configured to; determine that there is a read disturb error in a block; identify data that caused the read disturb error; and relocate the data that caused the read disturb error to a block with a higher read endurance. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
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26. A memory system comprising:
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a memory comprising a plurality of blocks; a plurality of read counters; and a read disturb module in communication with the memory and the plurality of read counters, wherein the read disturb module is configured to; sense a read disturb error in a first block; copy data from the first block to a second block; assign read counters to the second block to identify hot read data; copy the hot read data from the second block to a third block; assign read counters to the third block to determine when the hot read data becomes cold read data; and copy the cold read data from the third block to another block. - View Dependent Claims (27, 28, 29, 30, 31, 32, 33, 34, 35, 36)
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Specification