METHODS OF FORMING NMOS AND PMOS FINFET DEVICES AND THE RESULTING PRODUCT
First Claim
1. A method of forming NMOS and PMOS FinFET devices in an NMOS and PMOS region, respectively, of a semiconductor substrate, the method comprising:
- forming a plurality of trenches in said semiconductor substrate to thereby form a first fin for said NMOS FinFET device and a second fin for said PMOS FinFET device;
forming a layer of insulating material around said first and second fins;
performing at least one recess etching process on said first and second fins to define a recessed first fin and a recessed second fin and a replacement fin cavity in said layer of insulating material above each of said recessed first and second fins;
forming an initial strain relaxed buffer layer on said recessed first and second fins in their respective replacement fin cavities, wherein said initial strain relaxed buffer layer only partially fills said replacement fin cavities;
forming a masking layer that masks said PMOS region and exposes said NMOS region;
implanting carbon into said initial strain relaxed buffer layer in said NMOS region;
removing said masking layer;
forming a channel semiconductor material on said initial strain relaxed buffer layer within said replacement fin cavities in both said NMOS region and said PMOS region to thereby define an NMOS fin comprised of said channel semiconductor material and a carbon-doped strain relaxed buffer layer and a PMOS fin comprised of said channel semiconductor material and said initial strain relaxed buffer layer;
recessing said layer of insulating material so as to expose at least a portion of said NMOS fin and said PMOS fin;
forming a gate structure around said NMOS fin; and
forming a gate structure around said PMOS fin.
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Abstract
One illustrative method disclosed herein includes, among other things, recessing first and second fins to define replacement fin cavities in a layer of insulating material, forming an initial strain relaxed buffer layer such that it only partially fills the replacement fin cavities, implanting carbon into the initial strain relaxed buffer layer in the NMOS region, forming a channel semiconductor material on the initial strain relaxed buffer layer within the replacement fin cavities in both the NMOS region and the PMOS region to thereby define an NMOS fin comprised of the channel semiconductor material and a carbon-doped strain relaxed buffer layer and a PMOS fin comprised of the channel semiconductor material and the initial strain relaxed buffer layer and forming gate structures for the NMOS and PMOS devices.
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Citations
25 Claims
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1. A method of forming NMOS and PMOS FinFET devices in an NMOS and PMOS region, respectively, of a semiconductor substrate, the method comprising:
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forming a plurality of trenches in said semiconductor substrate to thereby form a first fin for said NMOS FinFET device and a second fin for said PMOS FinFET device; forming a layer of insulating material around said first and second fins; performing at least one recess etching process on said first and second fins to define a recessed first fin and a recessed second fin and a replacement fin cavity in said layer of insulating material above each of said recessed first and second fins; forming an initial strain relaxed buffer layer on said recessed first and second fins in their respective replacement fin cavities, wherein said initial strain relaxed buffer layer only partially fills said replacement fin cavities; forming a masking layer that masks said PMOS region and exposes said NMOS region; implanting carbon into said initial strain relaxed buffer layer in said NMOS region; removing said masking layer; forming a channel semiconductor material on said initial strain relaxed buffer layer within said replacement fin cavities in both said NMOS region and said PMOS region to thereby define an NMOS fin comprised of said channel semiconductor material and a carbon-doped strain relaxed buffer layer and a PMOS fin comprised of said channel semiconductor material and said initial strain relaxed buffer layer; recessing said layer of insulating material so as to expose at least a portion of said NMOS fin and said PMOS fin; forming a gate structure around said NMOS fin; and forming a gate structure around said PMOS fin. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of forming NMOS and PMOS FinFET devices in an NMOS and PMOS region, respectively, of a semiconductor substrate, the method comprising:
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forming a plurality of trenches in said semiconductor substrate to thereby form a first fin for said NMOS FinFET device and a second fin for said PMOS FinFET device; forming a layer of insulating material around said first and second fins; performing at least one first recess etching process on said first and second fins to define a recessed first fin and a recessed second fin and a replacement fin cavity in said layer of insulating material above each of said recessed first and second fins; forming an initial strain relaxed buffer layer on said recessed first and second fins in their respective replacement fin cavities, wherein said initial strain relaxed buffer layer fills substantially all of said replacement fin cavities above said recessed first and second fins; forming a masking layer that masks said PMOS region and exposes said NMOS region; implanting carbon into said initial strain relaxed buffer layer in said NMOS region; removing said masking layer; performing at least one second recess etching process on said initial strain relaxed buffer layer to define a recessed strain relaxed buffer layer, wherein said recessed strain relaxed buffer layer partially fills said replacement fin cavities; forming a channel semiconductor material on said recessed strain relaxed buffer layer within said replacement fin cavities in both said NMOS region and said PMOS region to thereby define an NMOS fin comprised of said channel semiconductor material and a carbon-doped recessed strain relaxed buffer layer and a PMOS fin comprised of said channel semiconductor material and said recessed strain relaxed buffer layer; recessing said layer of insulating material so as to expose at least a portion of said NMOS fin and said PMOS fin; forming a gate structure around said NMOS fin; and forming a gate structure around said PMOS fin. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A method of forming NMOS and PMOS FinFET devices in an NMOS and PMOS region, respectively, of a semiconductor substrate, the method comprising:
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forming an initial strain relaxed buffer layer on a surface of said semiconductor substrate; forming a trench within said initial strain relaxed buffer layer in said NMOS region; performing an epitaxial deposition process to form an in situ carbon-doped strain relaxed buffer layer in said trench; forming a channel semiconductor material on said initial strain relaxed buffer layer and on said in situ carbon-doped strain relaxed buffer layer in said trench; forming a plurality of fin-formation trenches that extend into said initial strain relaxed buffer layer so as to thereby form an NMOS fin comprised of said channel semiconductor material and said in situ carbon-doped strain relaxed buffer layer and a PMOS fin comprised of said channel semiconductor material and said initial strain relaxed buffer layer; forming a recessed layer of insulating material around said NMOS fin and said PMOS fin in said fin-formation trenches so as to expose at least a portion of said NMOS fin and said PMOS fin; forming a gate structure around said NMOS fin; and forming a gate structure around said PMOS fin. - View Dependent Claims (20, 21, 22, 23, 24, 25)
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Specification