METHODS OF FORMING NMOS AND PMOS FINFET DEVICES AND THE RESULTING PRODUCT

• US 20160225674A1
• Filed: 01/29/2015
• Published: 08/04/2016
• Est. Priority Date: 01/29/2015
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: GlobalFoundries, Inc.
• Inventors: Jacob, Ajey Poovannummoottil
• Granted Patent: US 9,741,622 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/26506 in group IV semiconductors
• CPC Class Codes: H01L 21/823807 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 21/823821 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 21/823878 isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility
• CPC Class Codes: H01L 29/165 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate

Abstract

One illustrative method disclosed herein includes, among other things, recessing first and second fins to define replacement fin cavities in a layer of insulating material, forming an initial strain relaxed buffer layer such that it only partially fills the replacement fin cavities, implanting carbon into the initial strain relaxed buffer layer in the NMOS region, forming a channel semiconductor material on the initial strain relaxed buffer layer within the replacement fin cavities in both the NMOS region and the PMOS region to thereby define an NMOS fin comprised of the channel semiconductor material and a carbon-doped strain relaxed buffer layer and a PMOS fin comprised of the channel semiconductor material and the initial strain relaxed buffer layer and forming gate structures for the NMOS and PMOS devices.

Claims

1. A method of forming NMOS and PMOS FinFET devices in an NMOS and PMOS region, respectively, of a semiconductor substrate, the method comprising:

forming a plurality of trenches in said semiconductor substrate to thereby form a first fin for said NMOS FinFET device and a second fin for said PMOS FinFET device;

forming a layer of insulating material around said first and second fins;

performing at least one recess etching process on said first and second fins to define a recessed first fin and a recessed second fin and a replacement fin cavity in said layer of insulating material above each of said recessed first and second fins;

forming an initial strain relaxed buffer layer on said recessed first and second fins in their respective replacement fin cavities, wherein said initial strain relaxed buffer layer only partially fills said replacement fin cavities;

forming a masking layer that masks said PMOS region and exposes said NMOS region;

implanting carbon into said initial strain relaxed buffer layer in said NMOS region;

removing said masking layer;

forming a channel semiconductor material on said initial strain relaxed buffer layer within said replacement fin cavities in both said NMOS region and said PMOS region to thereby define an NMOS fin comprised of said channel semiconductor material and a carbon-doped strain relaxed buffer layer and a PMOS fin comprised of said channel semiconductor material and said initial strain relaxed buffer layer;

recessing said layer of insulating material so as to expose at least a portion of said NMOS fin and said PMOS fin;

forming a gate structure around said NMOS fin; and

forming a gate structure around said PMOS fin.

2. The method of claim 1, wherein said initial strain relaxed buffer layer is comprised of silicon germanium (Si₍₁₋

x)Ge_x where “

x”

ranges from 0-1).

3. The method of claim 1, wherein said channel semiconductor material is comprised of silicon germanium (Si₍₁₋

x)Ge_x where “

x”

ranges from 0-1).

4. The method of claim 1, wherein said initial strain relaxed buffer layer is comprised of silicon germanium (Si₍₁₋

x)Ge_x where “

x”

ranges from 0-1) and said channel semiconductor material is comprised of substantially pure germanium.

5. The method of claim 1, wherein forming said initial strain relaxed buffer layer comprises performing an epitaxial deposition process.

6. The method of claim 1, wherein forming said channel semiconductor material comprises performing an epitaxial deposition process.

7. The method of claim 1, wherein implanting carbon into said initial strain relaxed buffer layer comprises implanting carbon using a carbon dose of 1E13-1E14 ions/cm² and an energy level of 20-30 keV.

8. The method of claim 1, wherein, prior to removing said masking layer, the method further comprises implanting a P-type dopant into said initial strain relaxed buffer layer in said NMOS region.

9. The method of claim 8, wherein implanting said P-type dopant into said initial strain relaxed buffer layer comprises implanting boron using a dopant dose of 1E13-5E16 ions/cm² and an energy level of 5-60 keV.

10. A method of forming NMOS and PMOS FinFET devices in an NMOS and PMOS region, respectively, of a semiconductor substrate, the method comprising:

forming a plurality of trenches in said semiconductor substrate to thereby form a first fin for said NMOS FinFET device and a second fin for said PMOS FinFET device;

forming a layer of insulating material around said first and second fins;

performing at least one first recess etching process on said first and second fins to define a recessed first fin and a recessed second fin and a replacement fin cavity in said layer of insulating material above each of said recessed first and second fins;

forming an initial strain relaxed buffer layer on said recessed first and second fins in their respective replacement fin cavities, wherein said initial strain relaxed buffer layer fills substantially all of said replacement fin cavities above said recessed first and second fins;

forming a masking layer that masks said PMOS region and exposes said NMOS region;

implanting carbon into said initial strain relaxed buffer layer in said NMOS region;

removing said masking layer;

performing at least one second recess etching process on said initial strain relaxed buffer layer to define a recessed strain relaxed buffer layer, wherein said recessed strain relaxed buffer layer partially fills said replacement fin cavities;

forming a channel semiconductor material on said recessed strain relaxed buffer layer within said replacement fin cavities in both said NMOS region and said PMOS region to thereby define an NMOS fin comprised of said channel semiconductor material and a carbon-doped recessed strain relaxed buffer layer and a PMOS fin comprised of said channel semiconductor material and said recessed strain relaxed buffer layer;

recessing said layer of insulating material so as to expose at least a portion of said NMOS fin and said PMOS fin;

forming a gate structure around said NMOS fin; and

forming a gate structure around said PMOS fin.

11. The method of claim 10, wherein said initial strain relaxed buffer layer is comprised of silicon germanium (Si₍₁₋

x)Ge_x where “

x”

ranges from 0-1).

12. The method of claim 10, wherein said channel semiconductor material is comprised of silicon germanium (Si₍₁₋

x)Ge_x where “

x”

ranges from 0-1).

13. The method of claim 10, wherein said initial strain relaxed buffer layer is comprised of silicon germanium (Si₍₁₋

x)Ge_x where “

x”

ranges from 0-1) and said channel semiconductor material is comprised of substantially pure germanium.

14. The method of claim 10, wherein forming said strain relaxed buffer layer comprises performing an epitaxial deposition process.

15. The method of claim 10, wherein forming said channel semiconductor material comprises performing an epitaxial deposition process.

16. The method of claim 10, wherein implanting carbon into said initial strain relaxed buffer layer comprises implanting carbon using a carbon dose of 1E13-1E14 ions/cm² and an energy level of 20-30 keV.

17. The method of claim 10, wherein, prior to removing said masking layer, the method further comprises implanting a P-type dopant into said initial strain relaxed buffer layer in said NMOS region.

18. The method of claim 17, wherein implanting said P-type dopant into said initial strain relaxed buffer layer comprises implanting boron using a dopant dose of 1E13-5E16 ions/cm² and an energy level of 5-60 keV.

19. A method of forming NMOS and PMOS FinFET devices in an NMOS and PMOS region, respectively, of a semiconductor substrate, the method comprising:

forming an initial strain relaxed buffer layer on a surface of said semiconductor substrate;

forming a trench within said initial strain relaxed buffer layer in said NMOS region;

performing an epitaxial deposition process to form an in situ carbon-doped strain relaxed buffer layer in said trench;

forming a channel semiconductor material on said initial strain relaxed buffer layer and on said in situ carbon-doped strain relaxed buffer layer in said trench;

forming a plurality of fin-formation trenches that extend into said initial strain relaxed buffer layer so as to thereby form an NMOS fin comprised of said channel semiconductor material and said in situ carbon-doped strain relaxed buffer layer and a PMOS fin comprised of said channel semiconductor material and said initial strain relaxed buffer layer;

forming a recessed layer of insulating material around said NMOS fin and said PMOS fin in said fin-formation trenches so as to expose at least a portion of said NMOS fin and said PMOS fin;

forming a gate structure around said NMOS fin; and

forming a gate structure around said PMOS fin.

20. The method of claim 19, wherein said initial strain relaxed buffer layer is comprised of silicon germanium (Si₍₁₋

x)Ge_x where “

x”

ranges from 0-1).

21. The method of claim 19, wherein said channel semiconductor material is comprised of silicon germanium (Si₍₁₋

x)Ge_x where “

x”

ranges from 0-1).

22. The method of claim 19, wherein said initial strain relaxed buffer layer is comprised of silicon germanium (Si₍₁₋

x)Ge_x where “

x”

ranges from 0-1) and said channel semiconductor material is comprised of substantially pure germanium.

23. The method of claim 19, wherein forming said initial strain relaxed buffer layer comprises performing an epitaxial deposition process.

24. The method of claim 19, wherein forming said channel semiconductor material comprises performing an epitaxial deposition process.

25. The method of claim 19, wherein the concentration of carbon in said in situ carbon-doped strain relaxed buffer layer falls within the range of about 1E19-1E21 ions/cm³.