SELF-REFERENCED MEMORY DEVICE AND METHOD FOR OPERATING THE MEMORY DEVICE

• US 20160232958A1
• Filed: 09/08/2014
• Published: 08/11/2016
• Est. Priority Date: 09/19/2013
• Status: Active Grant

• Current Assignee: Allegro Microsystems Incorporated (Sanken Electric Company Limited)
• Original Assignee: Crocus Technology S.A. (Sanken Electric Company Limited)
• Inventors: Bandiera, Sebastien
• Granted Patent: US 9,818,465 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G11C 11/161 details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
• CPC Class Codes: G11C 11/1659 Cell access
• CPC Class Codes: G11C 11/1673 Reading or sensing circuits or methods
• CPC Class Codes: G11C 11/1675 Writing or programming circuits or methods
• CPC Class Codes: H01F 10/3254 the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ]
• CPC Class Codes: H01F 10/3286 Spin-exchange coupled multilayers having at least one layer with perpendicular magnetic anisotropy
• CPC Class Codes: H10B 61/22 of the field-effect transistor [FET] type
• CPC Class Codes: H10N 50/10 Magnetoresistive devices
• CPC Class Codes: H10N 50/80 Constructional details
• CPC Class Codes: H10N 50/85 Magnetic active materials

Abstract

A self-referenced MRAM cell comprises a first portion of a magnetic tunnel junction including a storage layer; a second portion of the magnetic tunnel junction portion including a tunnel barrier layer, a sense layer and a seed layer; the seed layer comprising a material having high spin-orbit coupling such that passing a sense current along the plane of the sense layer and/or seed layer exerts a spin-orbit torque adapted for switching a sense magnetization of the sense layer. A memory device comprising a plurality of the MRAM cells and a method for operating the memory device are also disclosed.

Claims

1. A self-referenced MRAM cell (1) comprising

a first portion (2′

) of a magnetic tunnel junction (2) including a storage layer (23) having a storage magnetization (230);

a second portion (2″

) of the magnetic tunnel junction portion (2) including a tunnel barrier layer (22) and a sense layer (21) having a sense magnetization (210), the second portion (2″

) being connected to the first portion (2′

) such that the tunnel barrier layer (22) is comprised between the storage layer (23) and the sense layer (21);

characterized in that

the second portion (2″

) further comprises a seed layer (25) in contact with the sense layer (21) and comprising a material having high spin-orbit coupling such that passing a sense current (32) along the plane of the sense layer (21) and/or seed layer (25) exerts a spin-orbit torque adapted for switching the sense magnetization (210).

2. The MRAM cell (1) according to claim 1, wherein the high spin-coupling material comprises any one or a combination of elements selected from Ta, Pt, Pd, Au, Bi, Zn, Hf, Os, Pb, Tl, W, Tb, Gd, Ho, Dy, Pr, Sm, Nd, V, Ti, Te or Ir.

3. The MRAM cell (1) according to claim 1, wherein the high spin-coupling material comprises a low spin-orbit material doped with a high spin-coupling material comprising any one or a combination of elements selected from Ta, Pt, Pd, Au, Bi, Zn, Hf, Os, Pb, Tl, W, Tb, Gd, Ho, Dy, Pr, Sm, Nd, V, Ti, Te or Ir.

4. The MRAM cell (1) according to claim 3, wherein the low spin-orbit material comprises any one or a combination of elements selected from Cu, Si, Al, Mg or C.

5. The MRAM cell (1) according to any one of claims 1 to 4, further comprising a first sense transistor (8) electrically connected to one end of the second portion (2″

) and a second sense transistor (9) electrically connected to the other end of the single second portion (2″

), such that the sense current (32) can be passed along the plane of the sense layer (21) when the first and second sense transistors (8, 9) are in a passing mode.

6. The MRAM cell (1) according to claim 5, further comprising a switching transistor (7) electrically connecting the first portion (2′

), such that a write current (31, 33) can be passed in the first and second portions (2′

, 2″

) when the switching transistor (7) and one of the first and second sense transistor (8, 9) is in the passing mode.

7. The MRAM cell (1) according to claim 1, wherein the sense magnetization (210) is aligned substantially parallel or perpendicular to the plan of the sense layer (21).

8. A memory device (10) comprising a plurality of the MRAM cells (1) according to any one of claims 1 to 7 and arranged in rows and columns;

the second portion (2″

) extending along a row, or column with a first sense transistor (8) being electrically connected to one end of the second portion (2″

) and a second sense transistor (9) being electrically connected to the other end of the single second portion (2″

), such that the sense current (32) can pass along the plane of the sense layer (21) and/or seed layer (25) when the first and second sense transistors (8, 9) are in the passing mode;

a plurality of the first portion (2′

) being electrically connected along the second portion (2″

);

a switching transistor (7) electrically connecting in series two adjacent MRAM cells (1) along a column or row, sequentially via the first portion (2′

) and via the second portion (2″

), such that a current (31, 33, 34) can pass in the magnetic tunnel junction (2) of the MRAM cells (1) in the column, or row, when the switching transistor (7) is in the passing mode.

9. Method for operating the memory device (10) according to claim 8, comprising:

storing a reference bit included in a set of reference bits (12) in each of said plurality of MRAM cells (1);

presenting a target bit included in a set of target bits (12′

) in each of said plurality of MRAM cells (1);

comparing the reference bit stored in each of said plurality of MRAM cells (1) with the target bit presented to each of said plurality of MRAM cells (1) such as to determine that the set of target bits matches the stored set of reference bits (12);

said presenting a target bit comprising passing the sense current (32) having a first polarity for switching the sense magnetization (210) in a first direction and passing the sense current (32) having a second polarity for switching the sense magnetization (210) in a second direction

characterized in that

said switching the sense magnetization (210) comprises passing the sense current (32) along the plane of the sense layer (21) and/or seed layer (25), the sense magnetization (210) being switched by the spin-orbit torque exerted on the sense magnetization (210) by the sense current (32).

10. The method according to claim 9, wherein said storing a reference bit comprises switching the storage magnetization (230) by passing a write current (31, 33) in the magnetic tunnel junction (2).

11. The method according to claim 10, wherein said write current comprises a spin polarized write current (33).

12. The method according to claim 11, wherein a direction of the switched storage magnetization (230) is determined by selecting a polarity of the spin-polarized current (31) or by switching the sense magnetization (210) in a predetermined direction.

13. The method according to any one of claims 9 to 12, wherein the storage layer (23) is configured such that the storage magnetization (230) is switchable due to magnetostatic interaction with the sense layer (21) when the magnetic tunnel junction (2) is at a high temperature threshold;

and

wherein said write current comprises a heating current (33) being passed in the magnetic tunnel junction (2) such as to heat the magnetic tunnel junction (2) at the high temperature threshold.

14. The method according to any one of claim 9 or 13, wherein the sense magnetization (210) is switched in a direction substantially parallel to the plane of the sense layer (21) or in a direction substantially perpendicular to the plane of the sense layer (21).

15. The method according to claim 14 or 15, wherein said comparing the reference bit comprises either:

measuring a first resistance (R1) when the sense magnetization (210) is switched in the first direction, and measuring a second resistance (R2) when the sense magnetization (210) is switched in the second direction, by passing a read current (34) in the magnetic tunnel junction (2);

or

comparing a total resistance (R_TOT) measured for said plurality of MRAM cells (1) to a reference resistance.