TRANSISTOR, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE
First Claim
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1. A transistor comprising:
- a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer;
a first electrode, a second electrode, and a third electrode; and
a first insulating layer and a second insulating layer,wherein the first oxide semiconductor layer has an island shape and comprises a first region, a second region, and a third region,wherein the third region is between the first region and the second region,wherein the first electrode is over the first region,wherein the second electrode is over the second region,wherein the first insulating layer is over the first electrode and the second electrode with the second oxide semiconductor layer therebetween,wherein the second oxide semiconductor layer comprises a first opening,wherein the first insulating layer comprises a second opening,wherein the first opening and the second opening each overlap with the third region,wherein the third electrode is over the third region with the third oxide semiconductor layer and the second insulating layer therebetween,wherein the second oxide semiconductor layer covers a first side surface, a second side surface, the first region, and the second region in the first oxide semiconductor layer, andwherein the third oxide semiconductor layer covers third side surfaces and the third region in the first oxide semiconductor layer.
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Abstract
A transistor with favorable electrical characteristics is provided. A transistor with stable electrical characteristics is provided. A semiconductor device having a high degree of integration is provided. Side surfaces of an oxide semiconductor layer in which a channel is formed are covered with an oxide semiconductor layer, whereby impurity diffusion from the side surfaces of the oxide semiconductor into the inside can be prevented. A gate electrode is formed by a damascene process, whereby transistors can be miniaturized and formed at a high density.
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Citations
21 Claims
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1. A transistor comprising:
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a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer; a first electrode, a second electrode, and a third electrode; and a first insulating layer and a second insulating layer, wherein the first oxide semiconductor layer has an island shape and comprises a first region, a second region, and a third region, wherein the third region is between the first region and the second region, wherein the first electrode is over the first region, wherein the second electrode is over the second region, wherein the first insulating layer is over the first electrode and the second electrode with the second oxide semiconductor layer therebetween, wherein the second oxide semiconductor layer comprises a first opening, wherein the first insulating layer comprises a second opening, wherein the first opening and the second opening each overlap with the third region, wherein the third electrode is over the third region with the third oxide semiconductor layer and the second insulating layer therebetween, wherein the second oxide semiconductor layer covers a first side surface, a second side surface, the first region, and the second region in the first oxide semiconductor layer, and wherein the third oxide semiconductor layer covers third side surfaces and the third region in the first oxide semiconductor layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A transistor comprising:
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a first oxide semiconductor layer; a first electrode and a second electrode over the first oxide semiconductor layer; a second oxide semiconductor layer over the first electrode and the second electrode, the second oxide semiconductor layer having a first opening; a first insulating layer over the second oxide semiconductor layer, the first insulating layer having a second opening; a third oxide semiconductor layer in the first opening and the second opening; a second insulating layer over the third oxide semiconductor layer; and a third electrode over the third oxide semiconductor layer, wherein the second oxide semiconductor layer covers first side surfaces of the first oxide semiconductor layer crossing a channel length direction of the transistor, and wherein the third oxide semiconductor layer covers second side surfaces of the first oxide semiconductor layer crossing a channel width direction of the transistor. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21)
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Specification