DETECTING METHOD OF SUBSTANDARD STATE AND DISPLAY MODULE AND ELECTRONIC DEVICE OPERATING THE SAME

• US 20160247436A1
• Filed: 02/23/2016
• Published: 08/25/2016
• Est. Priority Date: 02/23/2015
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: KIM, Jae Wan, LEE, Joon Gyu
• Granted Patent: US 10,037,726 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G02F 1/136254 Checking; Testing
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2330/12 Test circuits or failure detection circuits included in a display system, as permanent part thereof
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/2003 Display of colours specific for liquid crystal displays G09G3/3607

Abstract

A display module is provided. The display module includes a display area which includes a plurality of pixels, a plurality of first conductive lines, and a plurality of second conductive lines intersecting the first conductive lines, a non-display area at least partially surrounding the display area, test circuitry electrically connected with the first conductive lines, and a third conductive line electrically connected between one of the first conductive lines and the test circuitry. The third conductive line may include a portion disposed in the non-display area and extending along a periphery of the display area.

Claims

1. An electronic device, comprising:

a housing;

a display module exposed through an opening in at least one side of the housing; and

a processor disposed in the housing and electrically connected to the display module,

wherein the display module comprises;

a display area comprising a plurality of first conductive lines and a plurality of second conductive lines intersecting with the first conductive lines;

a non-display area at least partially surrounding the display area;

test circuitry electrically connected to the first conductive lines; and

a third conductive line electrically connected between one of the first conductive lines and the test circuitry, and

wherein the third conductive line includes a portion disposed in the non-display area and extending along a periphery of the display area.

2. The electronic device of claim 1, wherein the test circuitry comprises switching elements electrically connected to the first conductive lines respectively, and

wherein the third conductive line electrically connects at least one of the first conductive lines and one of the switching elements.

3. The electronic device of claim 1, wherein the display area comprises a first periphery extending along a first direction in which the first conductive lines extend, and

wherein at least a portion of the third conductive line includes a portion extending along the first periphery.

4. The electronic device of claim 3, wherein the display area comprises a second periphery extending along a second direction in which the second conductive lines extend, and

wherein at least a portion of the third conductive line includes a portion extending along the second periphery.

5. The electronic device of claim 1, wherein remaining ones of the plurality of first conductive lines other than the first conductive line connected to the third conductive line extend substantially in parallel and are connected to the test circuitry, and

wherein the first conductive line connected to the third conductive line is connected to the test circuitry through the third conductive line.

6. The electronic device of claim 1, wherein the display area further comprises a plurality of pixels, and

wherein the plurality of pixels comprises:

a first pixel connected to one of the first conductive lines; and

a second pixel connected to a first conductive line connected to the third conductive line,

wherein when the third conductive line is not damaged, the first pixel and the second pixel display substantially a same color and/or luminance, and

wherein when the third conductive line is damaged, the first pixel and the second pixel display different colors and/or luminance from each other.

7. The electronic device of claim 1, wherein the display module further comprises a fourth conductive line electrically connected between another of the first conductive lines and the test circuitry, and

wherein the fourth conductive line includes a portion disposed in the non-display area and extending along a periphery of the display area.

8. The electronic device of claim 7, wherein the third conductive line and the fourth conductive line are respectively formed in different layers.

9. The electronic device of claim 1, wherein the display area comprises at least one of a data line, a gate line, a thin film transistor source, a thin film transistor drain, and a common electrode of a pixel, and

wherein the third conductive line is disposed in a layer where at least one of the data line, the gate line, the thin film transistor source, the thin film transistor drain, and the common electrode is formed and is electrically connected to at least one first conductive line disposed at substantially a center area of the display area.

10. The electronic device of claim 1, further comprising at least one of:

a data driver to which the first conductive lines are electrically connected;

at least one gate driver supplying a test signal to the third conductive line through the test circuitry, and

wherein the processor is configured to alternately output a data signal of the data driver and the test signal to the display area.

11. The electronic device of claim 1, wherein the processor is configured to supply a specific direct current gate signal and a specific data signal alternately to the third conductive line, and

wherein the processor is configured to adjust at least one of a magnitude or a period of at least one of the direct current gate signal or a data signal for test, to provide background luminance of the display area having a specific value.

12. A display module, comprising:

a display area comprising a plurality of first conductive lines and a plurality of second conductive lines intersecting the first conductive lines;

a non-display area at least partially surrounding the display area;

test circuitry electrically connected to the first conductive lines; and

a third conductive line electrically connected between one of the first conductive lines and the test circuitry, and

wherein the third conductive line includes a portion disposed in the non-display area and extending along a periphery of the display area.

13. The display module of claim 12, wherein the test circuitry comprises switching elements electrically connected to the first conductive lines respectively, and.

wherein the third conductive line electrically connects at least one of the first conductive lines and one of the switching elements.

14. The display module of claim 12, wherein the display area comprises a first periphery extending along a first direction in which the first conductive lines extend, and

wherein at least a portion of the third conductive line includes a portion extending along the first periphery.

15. The display module of claim 14, wherein the display area further comprises a second periphery extending along a second direction in which the second conductive lines extend, and

wherein the at least a portion of the third conductive line further includes a portion extending along the second periphery.

16. The display module of claim 12, wherein remaining ones of the plurality of first conductive lines other than the first conductive line connected to the third conductive line extend substantially in parallel and are connected to the test circuitry, and

wherein the first conductive line connected to the third conductive line is connected to the test circuitry through the third conductive line.

17. The display module of claim 12, wherein the display area further comprises a plurality of pixels, and

wherein the plurality of pixels comprises:

a first pixel connected to one of the first conductive lines; and

a second pixel connected to a first conductive line connected with the third conductive line,

wherein when the third conductive line is not damaged, the first pixel and the second pixel display substantially a same color and/or luminance, and

wherein when the third conductive line is damaged, the first pixel and the second pixel display different colors and/or luminance from each other.

18. The display module of claim 12, wherein the display module further comprises a fourth conductive line electrically connected between another of the first conductive lines and the test circuitry, and

wherein the fourth conductive line includes a portion disposed in the non-display area and extending along a periphery of the display area.

19. The display module of claim 12, wherein the third conductive line and the fourth conductive line are respectively formed in different layers from each other.

20. The display module of claim 15, wherein the display area comprises at least one of a data line, a gate line, a thin film transistor source, a thin film transistor drain, and a common electrode of a pixel, and

wherein the third conductive line is disposed in a layer where at least one of the data line, the gate line, the thin film transistor source, the thin film transistor drain, and the common electrode is formed and is electrically connected to at least one first conductive line disposed at a center area of the display area.