Semiconductor Device

• US 20160247929A1
• Filed: 02/23/2016
• Published: 08/25/2016
• Est. Priority Date: 02/25/2015
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Noda, Kosei
• Granted Patent: US 9,722,092 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66818 the channel being thinned after patterning, e.g. sacrificial oxidation on fin
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

To provide a transistor with favorable electrical characteristics. A semiconductor device includes a first insulator over a substrate; a first metal oxide over the first insulator; a second metal oxide over the first metal oxide; a first conductor and a second conductor over the second metal oxide; a third metal oxide over the second metal oxide, the first conductor, and the second conductor; a second insulator over the third metal oxide; and a third conductor over the second insulator. The second metal oxide includes a region in contact with a top surface of the first metal oxide and regions in contact with side surfaces of the first metal oxide. The second metal oxide includes channel formation regions.

Claims

1. A semiconductor device comprising:

a first insulator over a substrate;

a first metal oxide over the first insulator;

a second metal oxide over the first metal oxide;

a first conductor and a second conductor over the second metal oxide;

a third metal oxide over the second metal oxide, the first conductor, and the second conductor;

a second insulator over the third metal oxide; and

a third conductor over the second insulator,

wherein the second metal oxide includes a region in contact with a top surface of the first metal oxide and regions in contact with side surfaces of the first metal oxide, and

wherein the second metal oxide includes channel formation regions.

2. The semiconductor device according to claim 1,

wherein the first metal oxide, the second metal oxide, and the third metal oxide each contain at least one selected from indium, zinc, and an element M, the element M being one of aluminum, gallium, yttrium, and tin.

3. The semiconductor device according to claim 1,

wherein the first conductor and the second conductor each include a region in contact with a top surface of the second metal oxide and regions in contact with side surfaces of the second metal oxide in a cross section in a channel width direction.

7. The semiconductor device according to claim 1, further comprising a fourth conductor below the first insulator.

9. An electronic device equipped with the semiconductor device according to claim 1.

4. A semiconductor device comprising:

a first insulator over a substrate;

a first metal oxide over the first insulator;

a second metal oxide over the first metal oxide;

a third metal oxide over the second metal oxide;

a fourth metal oxide over the third metal oxide;

a first conductor and a second conductor over the fourth metal oxide;

a fifth metal oxide over the fourth metal oxide, the first conductor, and the second conductor;

a second insulator over the fifth metal oxide; and

a third conductor over the second insulator,

wherein the fourth metal oxide includes a region in contact with a top surface of the third metal oxide and regions in contact with side surfaces of the third metal oxide, and

wherein the second metal oxide and the fourth metal oxide include channel formation regions.

5. The semiconductor device according to claim 4,

wherein the first metal oxide, the second metal oxide, the third metal oxide, the fourth metal oxide, and the fifth metal oxide each contain at least one selected from indium, zinc, and an element M, the element M being one of aluminum, gallium, yttrium, and tin.

6. The semiconductor device according to claim 4,

wherein the first conductor or the second conductor include a region in contact with a top surface of the fourth metal oxide and regions in contact with side surfaces of the fourth metal oxide in a cross section in a channel width direction.

8. The semiconductor device according to claim 4, further comprising a fourth conductor below the first insulator.

10. An electronic device equipped with the semiconductor device according to claim 4.