POWER CONVERTER
First Claim
1. A power converter comprising:
- a plurality of semiconductor devices; and
a plurality of cooling plates,whereinthe plurality of semiconductor devices are stacked alternately with the plurality of cooling plates, each of the semiconductor devices being in close contact with the corresponding adjacent cooling plate,the plurality of semiconductor devices includes a first-first sealed semiconductor device, a second-first sealed semiconductor device, and a second sealed semiconductor device,each of the first-first sealed semiconductor device and the second-first sealed semiconductor device comprises a first semiconductor structure which is sealed with first resin, and the first semiconductor structure includes a first transistor and a first diode connected in parallel with the first transistor,the first-first sealed semiconductor device includes;
a first high potential side terminal connected to a cathode of the first diode of the first-first sealed semiconductor device, a first portion of the first high potential side terminal being outside of the first resin; and
a first low potential side terminal connected to an anode of the first diode of the first-first sealed semiconductor device, a second portion of the first low potential side terminal being outside of the first resin,the second-first sealed semiconductor device includes;
a second high potential side terminal connected to a cathode of the first diode of the second-first sealed semiconductor device, a third portion of the second high potential side terminal being outside of the first resin; and
a second low potential side terminal connected to an anode of the first diode of the second-first sealed semiconductor device, a fourth portion of the second low potential side terminal being outside of the first resin,the second sealed semiconductor device comprises a plurality of second semiconductor structures,each of the second semiconductor structures is sealed with second resin and includes a second transistor and a second diode connected in parallel with the second transistor,at least two of the second transistors included in the plurality of second semiconductor structures are connected in series,the first low potential side terminal of the first-first sealed semiconductor device is connected with the second high potential side terminal of the second-first sealed semiconductor device, andwhen viewed along a stacking direction of the plurality of semiconductor devices and the plurality of cooling plates, the first portion of the first high potential side terminal of the first-first sealed semiconductor device that is outside of the first resin is disposed to overlap with the fourth portion of the second low potential side terminal of the second-first sealed semiconductor device that is outside of the first resin.
2 Assignments
0 Petitions
Accused Products
Abstract
In a power converter, a plurality of semiconductor devices and a plurality of cooling plates are stacked. The plurality of semiconductor devices includes a first-first sealed semiconductor device, a second-first sealed semiconductor device, and a plurality of second sealed semiconductor devices. The first-first sealed semiconductor device has a first high potential side terminal, and a first low potential side terminal. The second-first sealed semiconductor device has a second high potential side terminal, and a second low potential side terminal. When viewed along a stacking direction, the first high potential side terminal is disposed to overlap with the second low potential side terminal.
19 Citations
10 Claims
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1. A power converter comprising:
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a plurality of semiconductor devices; and a plurality of cooling plates, wherein the plurality of semiconductor devices are stacked alternately with the plurality of cooling plates, each of the semiconductor devices being in close contact with the corresponding adjacent cooling plate, the plurality of semiconductor devices includes a first-first sealed semiconductor device, a second-first sealed semiconductor device, and a second sealed semiconductor device, each of the first-first sealed semiconductor device and the second-first sealed semiconductor device comprises a first semiconductor structure which is sealed with first resin, and the first semiconductor structure includes a first transistor and a first diode connected in parallel with the first transistor, the first-first sealed semiconductor device includes; a first high potential side terminal connected to a cathode of the first diode of the first-first sealed semiconductor device, a first portion of the first high potential side terminal being outside of the first resin; and a first low potential side terminal connected to an anode of the first diode of the first-first sealed semiconductor device, a second portion of the first low potential side terminal being outside of the first resin, the second-first sealed semiconductor device includes; a second high potential side terminal connected to a cathode of the first diode of the second-first sealed semiconductor device, a third portion of the second high potential side terminal being outside of the first resin; and a second low potential side terminal connected to an anode of the first diode of the second-first sealed semiconductor device, a fourth portion of the second low potential side terminal being outside of the first resin, the second sealed semiconductor device comprises a plurality of second semiconductor structures, each of the second semiconductor structures is sealed with second resin and includes a second transistor and a second diode connected in parallel with the second transistor, at least two of the second transistors included in the plurality of second semiconductor structures are connected in series, the first low potential side terminal of the first-first sealed semiconductor device is connected with the second high potential side terminal of the second-first sealed semiconductor device, and when viewed along a stacking direction of the plurality of semiconductor devices and the plurality of cooling plates, the first portion of the first high potential side terminal of the first-first sealed semiconductor device that is outside of the first resin is disposed to overlap with the fourth portion of the second low potential side terminal of the second-first sealed semiconductor device that is outside of the first resin. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification