METHOD FOR IC TESTING BIGDATA ANALYSIS OPTION VALUE ANALYSIS
First Claim
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1. A method for IC testing bigdata analysis and option value analysis, comprising the steps of:
- obtaining data;
dividing a test wafer into a plurality of test chips, each of the test chips being tested for electrical property and captured data under various parameters;
sorting parameter;
a specific parameter being sorted from the various parameters according to a requirement of an analysis result;
defining three-dimensional space coordinates;
compiling a program, defining a three-dimensional space coordinate in the program, comprising an X-coordinate axis, a Y-coordinate axis, and a Z-coordinate axis, wherein the X-coordinate axis and the Y-coordinate axis represent locations of the plurality of devices under test on the wafer, whereas the Z-coordinate axis represents the specific parameter;
analyzing the specific parameter;
in the program, calculating and analyzing all the specific parameters of the plurality of devices under test, so as to generate a plurality of reference values corresponding to the specific parameters;
drawing a parameter location map;
loading the program and the plurality of reference values into a drawing software, producing a parameter location map of a three-dimensional cylindrical perspective graphic according to a plurality of coordinate points X, Y, Z;
wherein physical locations of the plurality of devices under test on the wafer are formed at graduations of the X-coordinate axis and the Y-coordinate axis, and, given the locations of the devices under test with respect to the graduations of the X-coordinate axis and the Y-coordinate axis, a three-dimensional cylindrical perspective graphic corresponding to the specific parameter is formed on the Z-coordinate axis according to the reference values thus obtained;
wherein, with the parameter location map, it is feasible to dynamically rotate the X-coordinate axis, the Y-coordinate axis and the Z-coordinate axis to achieve different angles of view, and the three-dimensional cylindrical perspective graphic formed on the Z-coordinate axis displays difference in color to discern the specific parameters attributed to the devices under test.
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Abstract
A method for IC testing bigdata analysis and option value analysis includes: dividing a wafer into devices under test to undergo an electrical property test, retrieving data detected of the devices under test at different parameters; sorting specific parameters from different parameters according to an intended analysis result; loading a drawing software into a program, defining three-dimensional spatial coordinates, and producing a parameter location map of a three-dimensional cylindrical perspective graphic in three-dimensional spatial coordinates according to coordinate points X, Y, Z.
7 Citations
7 Claims
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1. A method for IC testing bigdata analysis and option value analysis, comprising the steps of:
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obtaining data;
dividing a test wafer into a plurality of test chips, each of the test chips being tested for electrical property and captured data under various parameters;sorting parameter;
a specific parameter being sorted from the various parameters according to a requirement of an analysis result;defining three-dimensional space coordinates;
compiling a program, defining a three-dimensional space coordinate in the program, comprising an X-coordinate axis, a Y-coordinate axis, and a Z-coordinate axis, wherein the X-coordinate axis and the Y-coordinate axis represent locations of the plurality of devices under test on the wafer, whereas the Z-coordinate axis represents the specific parameter;analyzing the specific parameter;
in the program, calculating and analyzing all the specific parameters of the plurality of devices under test, so as to generate a plurality of reference values corresponding to the specific parameters;drawing a parameter location map;
loading the program and the plurality of reference values into a drawing software, producing a parameter location map of a three-dimensional cylindrical perspective graphic according to a plurality of coordinate points X, Y, Z;
wherein physical locations of the plurality of devices under test on the wafer are formed at graduations of the X-coordinate axis and the Y-coordinate axis, and, given the locations of the devices under test with respect to the graduations of the X-coordinate axis and the Y-coordinate axis, a three-dimensional cylindrical perspective graphic corresponding to the specific parameter is formed on the Z-coordinate axis according to the reference values thus obtained;wherein, with the parameter location map, it is feasible to dynamically rotate the X-coordinate axis, the Y-coordinate axis and the Z-coordinate axis to achieve different angles of view, and the three-dimensional cylindrical perspective graphic formed on the Z-coordinate axis displays difference in color to discern the specific parameters attributed to the devices under test. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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Specification